Thomas Lange 87423d740b MIPS: Implement ethernet halt for au1x00 ... Implement ethernet halt() by putting MAC0 in reset. If we do not do this, we will get memory corruption when ethernet frames are received during early OS boot. Signed-off-by: Thomas Lange <thomas@corelatus.se> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>		2009-05-16 09:20:03 +09:00
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Makefile	MIPS: cpu/mips/Makefile: Add a missing START line	2009-02-21 22:03:24 +01:00
asc_serial.c	…
asc_serial.h	…
au1x00_eth.c	MIPS: Implement ethernet halt for au1x00	2009-05-16 09:20:03 +09:00
au1x00_serial.c	…
au1x00_usb_ohci.c	Fix e-mail address of Gary Jennejohn.	2009-05-15 22:11:59 +02:00
au1x00_usb_ohci.h	Replace __attribute references with __attribute__	2009-04-28 01:01:39 +02:00
cache.S	…
config.mk	…
cpu.c	MIPS: Add flush_dcache_range() and invalidate_dcache_range()	2009-01-27 23:06:58 +09:00
incaip_clock.c	Cleanup: fix "MHz" spelling	2008-10-21 11:25:39 +02:00
incaip_wdt.S	…
interrupts.c	…
start.S	MIPS: Flush data cache upon relocation	2008-12-10 23:29:12 +09:00