392d4cef34
modify the cpll and gpll register. support Hpll set/get rate. Change-Id: I46b372078435bc70a34d1402d43ce2431110ddbd Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> |
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| .. | ||
| aspeed | ||
| at91 | ||
| exynos | ||
| renesas | ||
| rockchip | ||
| tegra | ||
| uniphier | ||
| Kconfig | ||
| Makefile | ||
| clk-uclass.c | ||
| clk_bcm6345.c | ||
| clk_boston.c | ||
| clk_fixed_rate.c | ||
| clk_pic32.c | ||
| clk_sandbox.c | ||
| clk_sandbox_test.c | ||
| clk_stm32f7.c | ||
| clk_zynq.c | ||
| clk_zynqmp.c | ||