Patrick Delaunay ee9b3572a4 UPSTREAM: dm: spi: Read default speed and mode values from DT ... This patch update the behavior introduced by commit 96907c0fe5 ("dm: spi: Read default speed and mode values from DT") In case of DT boot, don't read default speed and mode for SPI from CONFIG_* but instead read from DT node. This will make sure that boards with multiple SPI/QSPI controllers can be probed at different bus frequencies and SPI modes. Remove also use in boards of the value speed=0 (no more supported) for ENV in SPI by using CONFIG_ENV_SPI_MAX_HZ=0. DT values will be always used when available (full DM support of SPI slave with available DT node) even if speed and mode are requested; for example in splash screen support (in splash_sf_read_raw) or in SPL boot (in spl_spi_load_image). The caller of spi_get_bus_and_cs() no more need to force speed=0. But the current behavior don't change if the SPI slave is not present (device with generic driver is created automatically) or if platdata is used (CONFIG_OF_PLATDATA). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> Change-Id: I6f5990b73f33815a7acb9b5da9c90dce48b6211d Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit b0cc1b846fcb310c0ac2f8cbeb4ed5947dc52912)		2019-07-05 19:33:50 +08:00
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Kconfig	UPSTREAM: spi: Add non DM version of SPI_MEM	2019-07-05 19:33:49 +08:00
Makefile	UPSTREAM: spi: Add non DM version of SPI_MEM	2019-07-05 19:33:49 +08:00
altera_spi.c	…
ath79_spi.c	…
atmel_spi.c	UPSTREAM: wait_bit: use wait_for_bit_le32 and remove wait_for_bit	2019-07-05 19:21:04 +08:00
atmel_spi.h	…
cadence_qspi.c	…
cadence_qspi.h	…
cadence_qspi_apb.c	UPSTREAM: wait_bit: use wait_for_bit_le32 and remove wait_for_bit	2019-07-05 19:21:04 +08:00
cf_spi.c	…
davinci_spi.c	…
designware_spi.c	…
exynos_spi.c	…
fsl_dspi.c	…
fsl_espi.c	…
fsl_qspi.c	UPSTREAM: wait_bit: use wait_for_bit_le32 and remove wait_for_bit	2019-07-05 19:21:04 +08:00
fsl_qspi.h	…
ich.c	x86: ich-spi: Clear atomic preop only when SPI settings are not locked	2017-09-02 23:35:55 +08:00
ich.h	x86: ich-spi: Don't read cached lock status	2017-08-24 11:00:47 +08:00
kirkwood_spi.c	…
lpc32xx_ssp.c	treewide: replace with error() with pr_err()	2018-01-17 15:27:28 +08:00
mpc8xx_spi.c	…
mpc8xxx_spi.c	…
mvebu_a3700_spi.c	UPSTREAM: wait_bit: use wait_for_bit_le32 and remove wait_for_bit	2019-07-05 19:21:04 +08:00
mxc_spi.c	…
mxs_spi.c	…
omap3_spi.c	…
pic32_spi.c	…
rk_spi.c	UPSTREAM: rockchip: spi: Convert to livetree	2018-01-16 18:16:48 +08:00
rk_spi.h	…
rockchip_sfc.c	spi: rockchip sfc: remove header file	2018-02-05 21:01:28 +08:00
sandbox_spi.c	UPSTREAM: sandbox: spi: Add more logging	2019-07-05 19:33:45 +08:00
sh_qspi.c	…
sh_spi.c	…
sh_spi.h	…
soft_spi.c	…
soft_spi_legacy.c	…
spi-emul-uclass.c	…
spi-mem-nodm.c	UPSTREAM: spi: Add non DM version of SPI_MEM	2019-07-05 19:33:49 +08:00
spi-mem.c	UPSTREAM: spi: spi-mem: Claim SPI bus before spi mem access	2019-07-05 19:33:49 +08:00
spi-uclass.c	UPSTREAM: dm: spi: Read default speed and mode values from DT	2019-07-05 19:33:50 +08:00
spi.c	…
stm32_qspi.c	UPSTREAM: mtd: spi: Switch to new SPI NOR framework	2019-07-05 19:33:49 +08:00
tegra20_sflash.c	…
tegra20_slink.c	…
tegra114_spi.c	…
tegra210_qspi.c	…
tegra_spi.h	…
ti_qspi.c	…
xilinx_spi.c	…
zynq_qspi.c	…
zynq_spi.c	…