We reserve firmware region after MMU is enabled and translation
table set up, so that the region can be mapped as cacheable to
communicate with firmware by share memory.
Change-Id: I9ba6fc1bc5e8b794dcf5e693fbc2a29a8f2187d3
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Some platform requires to reserve memory regions for some firmware
to avoid kernel touches it, but U-Boot may have communication with
firmware by share memory. So that we had better reserve firmware
region after the initr_caches() which enables MMU and init
translation table, we need firmware region to be mapped as cacheable
like other regions, otherwise there would be dcache coherence issue
between firmware and U-Boot.
Change-Id: Icb986022b484c96dffcafc98972ae24362cb8e4b
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Since we have TPL, the SPL is actually running in SDRAM and there
should be no size limit by sram size.
Change-Id: Ic466777c51e75c9ac83c1cc7be926a0f2c0cacaa
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
If data error, we will reset the controller and wait when it is
ready. But the timeout data type is u32, it is never less than
zero. So change judgement data to one.
Change-Id: If049da06ecfe42fd31cca344bf87f69f7850dbe2
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Make clock ids consistent with kernel.
Support more clks to set and get rate.
Add clk dump.
Change-Id: I348c98ce81ce76af9c492a30480fcb495da7ed79
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
- read dtbo from recovery or dtbo partition;
- append "androidboot.dtbo_idx" to cmdline;
- apply dtb overlay when first read kernel dtb;
- pass dtb that first time read to kernel;
Change-Id: Iba5c02c1307d3dad69ef96d3b3b0927fb507be8f
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
When DTBO is enabled, dtbo may provide "bootargs_ext" to append
cmdline base on "bootargs".
Change-Id: I4abf554591a3983c5f41494ecadf5614b8f6404b
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
dtimg command allows user to work with Android DTB/DTBO image format.
Such as, getting the address of desired DTB/DTBO file, printing the dump
of the image in U-Boot shell, etc.
This command is needed to provide Android boot with new Android DT image
format further.
Change-Id: I2a626f333f604b6f0424aa03feaddab4e8506a3f
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
(am from http://patchwork.ozlabs.org/patch/925871/)
Android documentation recommends new image format for storing DTB/DTBO
files: [1]. To support that format, this patch adds helper functions for
Android DTB/DTBO format. In image-android-dt.* files you can find helper
functions to work with Android DT image format, such us routines for:
- printing the dump of image structure
- getting the address and size of desired dtb/dtbo file
This patch uses dt_table.h file, that was added in 643cefa4d848 ("Import
Android's dt_table.h for DT image format") by Alex Deymo.
[1] https://source.android.com/devices/architecture/dto/partitions
Change-Id: I78f6750af6c4fecb80d331bc06bc5cbe98da5825
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
(am from http://patchwork.ozlabs.org/patch/925870/)
Android documentation defines the recommended image format for storing
DTB/DTBO files in a single dtbo.img image. This patch includes the
latest header file with the struct definitions for this format from
AOSP.
The header was adapted to U-Boot's coding style and the function
declarations were removed.
Change-Id: I4d3a452b600a6908f4b720b6e6c926c918be5630
Signed-off-by: Alex Deymo <deymo@google.com>
[trini: Change SDPX tag location]
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
(cherry picked from commit 643cefa4d848a9358951caab42b5f9cd15e4fb5f)
As clk_set_defaults() is removed in device core, so add it in clock
driver.
Change-Id: Ib5b9a7f81c738c65f2cb3e0ca74a410cda2ca1e2
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
The new print format can reduce startup time.
Change-Id: I7ea53e07b8245fe4b5ef1fa15dd1f6efb176db47
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
If the gpll and npll freq is no change,don't set pll once again.
Change-Id: Ib16a0a1ff56560997b6ed4b487fc2d56928c14ec
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Make clock ids consistent with kernel.
support more clks to set and get rate.
add clk init.
Change-Id: I1e6b5734887e0bd5d845f1286f10eb0e3e42bc08
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
set frame effect to fix mistake fild when in interlace mode.
Change-Id: Ic4e7b7134bd54aa65d31264a3e4625eebdc229c5
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
SPI Nand and Nand flash devices are supported
Change-Id: Ic4dbd5cf38bd46be474bb410224a9082bce1b5f2
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
If emmc driver config MMC_TIMING_MMC_HS, need config
controller SDHCI_HOST_CONTROL2 register SDHCI_CTRL_UHS_SDR50.
It will affect emmc phy work mode.
Change-Id: Ib45f30eb6b70bde6f1beb4612ded17ee2b24b5fe
Signed-off-by: chenfen <chenfen@rock-chips.com>
Priority to use cru division is better timing than use controller
division.
Change-Id: I8b7b9a9c99f09407f209fda8df6460136a3105e9
Signed-off-by: chenfen <chenfen@rock-chips.com>
1.Add vendor ops api for nand devices;
2.Remove unused headfile.
3.Make rkflash block driver reachable by other devices
Change-Id: I26129cb94382b0714b9c35f4dc6113ddb752251c
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
1.Under the control of sfc, SPI Nand and SPI Nor are registered as two
different if_type block dev and are both the child_dev of sfc:
a.Dev 0: blk_dev "rkflash", devenum 0, if_type SpiNand
b.Dev 1: blk_dev "rkflash", devenum 1, if_type SpiNor
Change-Id: Iaa90fdc5c0926495c989189b9ef9e317b70f23a4
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
1.In rkflash driver, SPI Nand and SPI Nor are registered as two
different if_type
block dev. They are both the child_dev of sfc;
2.Here we send cmd to "rksfc" to operate it's child-dev spi flash device.
Change-Id: I9314ef9c556f8cfbe023021bd66bebec137a4e71
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
Hisping Lin
Joseph Chen
Kever Yang
Jason Zhu
Elaine Zhang
Zhangbin Tong
Sam Protsenko
Alex Deymo
Finley Xiao
Dingqiang Lin
Wyon Bi
Nickey Yang
Sandy Huang
chenfen