3db2d9fdeb
rockchip: weak: support soft gunzip image
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I645627b9e6c1e027be9532f25f3da7bc1e7b6928
2020-10-22 16:37:49 +08:00
392231a732
rockchip: add make_fit_atf.sh for armv8 to generate u-boot.itb
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Add support:
- decode bl31.elf to binary;
- include tee.bin dynamically;
- none or gzip compression;
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I483cb81b6ab05a89fd0df3a2a7d95e6ff3ad6636
2020-10-22 16:37:49 +08:00
9e84e21cf4
configs: rv1126: use make_fit_optee.sh as fit generator
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I31237cbcefcd62a0abbe7a549f46ad41f646ac55
2020-10-22 16:37:49 +08:00
65a17145ae
rockchip: make_fit_optee.sh: sync from rv1126_make_fit.sh
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Iaa3dc834b9e49e025d9feed1c03965ef2f1a4f35
2020-10-22 16:37:49 +08:00
c45a6d11b5
rockchip: rv1126: fit: clean coding style
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ibfba9e70d3d5bcae8bd6850ab546edc736f56ba4
2020-10-22 16:37:49 +08:00
a9c93f9d80
rockchip: make_fit_args: support make u-boot.itb command
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The command pass board dtb as arg1.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ie96ad09665698904978caca82ec38843930ed09e
2020-10-22 16:37:49 +08:00
45dfd9925e
rockchip: make_fit_atf.py: remove '@1' of nodes
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I9a398826213dd66df58aeac985146997e085f7d1
2020-10-22 16:37:49 +08:00
ea89190d3a
rockchip: vendor: Deinit bootdev_type if initial process fail
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Change-Id: I1da43b5e576bfc3410c30794986975f2cb0ee092
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-10-13 19:30:07 +08:00
a04950ce79
rockchip: rv1126: init QoS for ramboot
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There is not SPL for ramboot, let's init QoS for it.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ib6221122c44702cb4f287bad721316751478be71
2020-10-12 15:38:21 +08:00
9a4028eb5b
rockchip: rv1126: Set BOOT_WATCHDOG flag if reset by WDT
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Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Ia3d437c33ae9a7d3f666df70c484e1e6b28a90e5
2020-10-12 11:48:11 +08:00
b444b7fa1e
rockchip: rv1126: fix typo
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: If26223219d3f0e3d6ca37b6bc0c740411a87fe01
2020-10-10 16:17:06 +08:00
a964d8e5bb
clk: rockchip: rv1126: mux partial clocks to GPLL for tb
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Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: I33d2396d0de5bb5fc81990a1ae10e4c80f45e5cd
2020-09-30 17:36:47 +08:00
eeb4ca8743
rockchip: rv1126: mux clocks to none-cpll
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Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: Ida1561569814d6a139818820940012ce7b9f856b
2020-09-30 17:36:40 +08:00
796dfc0875
rockchip: rv1126: Adjust the parameters of GPLL's VCO for THUNDER_BOOT
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Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Change-Id: Ib322b62c1adbe355c2d64488fb33266bca974ea5
2020-09-30 14:51:19 +08:00
1252bc90e4
rockchip: rv1126: config PMU_NOC_AUTO_CON
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When perform idle operation, corresponding clock can
be opened or gated automatically.
Change-Id: Ib33115024b3f85f1f8bcabf2548caf3b13b0361f
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-09-28 14:44:07 +08:00
02b8a383be
rockchip: rk3308: remove unused code
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Id079ca34c140de00c1a798327420c8687c660631
2020-09-24 17:13:18 +08:00
7abb254d74
rockchip: board: correct debug uart init
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Should use debug_uart_init() which include board_debug_uart_init().
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ib3479aed3e874ac11da3ebb8f8868a6f43218ef8
2020-09-24 17:13:18 +08:00
2a3fb7bb04
arm: cp15: only map periph device region as dcache off for thunder-boot SPL
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Don't waste time to map all 4GB region.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I24ba4e4e42545dcf3ac6622c36995485956eae1b
2020-09-21 15:41:43 +08:00
745aeb1a7d
common: android: add boot_img_hdr_v3 and vendor boot support
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Android Header v3 and vendor boot partition are introduced
from Android-11(R).
Header populate:
Header v3 is no longer compatible with v0/1/2 header, we
add populate_andr_img_hdr() to merge boot and vendor_boot
partition header into struct andr_img_hdr in order to
compatible with v0/1/2 header.
resource.img:
The second_addr and second_size fields are removed in v3,
so we require resource partition to restore resource.img.
A/B system:
If not A/B system, the boot.img header version is 3 and
recovery header is version 2.
AVB load image:
- If allow verification error: the image is loaded by
ops->get_preloaded_partition() which auto populates
boot_img_hdr_v3.
- If not allow verification error: the image is full loaded
by ops->read_from_partition() which doesn't populate
boot_img_hdr_v3, we need to fix it.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I2afce53c43d782fc57baa01acf9c05518b580840
2020-09-18 14:41:37 +08:00
e50bd74269
rockchip: dts: rv1126: correct build errror
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this patch fixed "rockchip: dts: rv1126: SFC add pinctrl"
build error log:
Error: arch/arm/dts/rv1126-pinctrl.dtsi:291.3-4 syntax error
FATAL ERROR: Unable to parse input tree
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Change-Id: I4dde5b49fc2b56701b3326bca4978529286455c3
2020-09-16 11:01:58 +08:00
bc966f92a1
rockchip: dts: rv1126: SFC add pinctrl
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1.SFC add pinctrl;
2.Adjust fspi_pins property.
Change-Id: Ia89669aeee9a5097c7a74850b478891573493f1d
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-09-16 08:38:10 +08:00
958e04de67
rockchip: rv1126: tpl: thunder boot use SPL_KERNEL_BOOT
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Use CONFIG_SPL_KERNEL_BOOT for thunder boot to stay the same with SPL.
Change-Id: I0d2f0a91a5f628233de1cb848519fd76b692a2af
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
2020-09-16 08:37:30 +08:00
f870210e35
rockchip: resource: add comments
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I45434529a44a5e311af1b693c0af56473c770bf9
2020-09-15 10:55:29 +08:00
aec089f883
rockchip: rv1126: Pull up SFC IO2
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GPIO0_D6 pull down in default, but it's needed for SPI Flash with
WP# pin pull up.
Change-Id: I80a79e0072f1fff49673bbe834f51603e10283dc
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-09-14 17:12:18 +08:00
1dd64bce5e
rockchip: rv1126: clean arch_cpu_init() for SPL
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Moving current configurations into SPL boot stage except
something belongs to USBPLUG.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I64ec47f7c0c3cef57854a72af86e9ef1bebbcaed
2020-09-14 15:39:08 +08:00
de58289ebb
rockchip: rv1126: reduce npu aclk and sclk when reset
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Change-Id: I29644c83b20ecf40d5005119a86f2bcaad410c34
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2020-08-31 15:28:45 +08:00
446ef41c12
clk: rockchip: rv1126: always support decompress clock get/set
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The SPL without thunder-boot or U-Boot needs it.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ie2d8b59e35fbc2056cfbc910dae94419afcbfc09
2020-08-21 17:49:13 +08:00
f0daa6c11d
rockchip: spl: update the led function interface
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Update led_set_on to led_set_state since it has been changed.
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I0a42776c4c5453631093dbc64b8bf0dec2439a59
2020-08-20 17:23:02 +08:00
c1c74825e9
rockchip: spl: use CONFIG_SPL_KERNEL_BOOT for thunder-boot
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Following the lates spl fit framework.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ib87a048b5736ee8ce342dfae208b92d6d5943080
2020-08-20 15:04:37 +08:00
e220d75725
rockchip: spl: initial start tick of SPL total time
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ia46ea33e688109658c34b4a95e45e7e88c25fb31
2020-08-20 15:04:37 +08:00
396e3049bd
rochchip: board: only map op-tee share memory as dcache enabled
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The cache fixup is for the data coherence when communication
between U-Boot and OP-TEE. And data abort exception appeares on
OP-TEE V1 32bit platform due to unknown reason.
So only the share memory need be mapped as dcache enabled.
Signed-off-by: Elon Zhang <zhangzj@rock-chips.com>
Change-Id: I92b62ef5fbdf47adc0328a14034a5861e8e77fed
2020-08-14 15:39:42 +08:00
403d8d4c21
clk: rockchip: rk322x: add support to set and get spi clock
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Change-Id: I361aa06aa795d2c041d2bdad9ee5ff6982d554fc
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-08-13 09:29:49 +08:00
7f619f26d7
clk: rockchip: rk3128: add support to set and get spi clock
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Change-Id: I4ac874ba0542474baf18491f986f401c831a5ad4
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-08-13 09:29:49 +08:00
df77e7a38c
clk: rockchip: rk3036: add support to set and get spi clock
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Change-Id: I24db5f250fa89845b62005950d520600434adb99
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-08-13 09:29:49 +08:00
db5be31cab
clk: rockchip: rv1108: add support to set and get spi clock
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Change-Id: I96891a4adb53bbb84e27cc0ac5eddf3c613c1baa
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-08-13 09:29:49 +08:00
3965b9dee4
rockchip: rv1126: make fit: support gzip pack empty u-boot-nodtb.bin
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Checking file size in case of "./make.sh --no-uboot ...".
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I9fd89a4b02e0afab7622f375af580e94e32b5309
2020-08-11 15:22:33 +08:00
702e26dabb
rockchip: rkimg: update download key comment
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I1ccb716f49ad4fca18ca06276a9a7792e2d9e7a9
2020-08-05 15:48:54 +08:00
c7bb7b9f0a
rockchip: rv1126: Fix typo
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Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Iccc3a0467a8871a216fcc8746439379ad27d81f5
2020-08-04 17:31:29 +08:00
6b1e79fecf
rockchip: rv1126: Enable dynamic priority for ISP
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Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I063324d62304e8c53c6db43f72cdc804a507f9ef
2020-08-04 17:31:29 +08:00
87b478d1ec
rockchip: rv1126: adjust qos priority for ISP/ISPP
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Change-Id: I43b83350163414b161b7e59d5c234af9c0149363
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2020-08-04 17:31:29 +08:00
102dfafc4a
rochchip: board: map op-tee memory as dcache enabled
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For all 32-bit platforms, op-tee require dcache enabled
from now on.
Signed-off-by: Elon Zhang <zhangzj@rock-chips.com>
Change-Id: I2cd67457c7d441d35e8e0b191c8dfc89f5e4e541
2020-08-04 14:38:23 +08:00
70fee8b333
rv1126: ddr: update drv odt table
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Change-Id: Ic20957d02c36fe2d167c1a63b5e016535a181baf
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
2020-08-03 10:22:37 +08:00
7b01a70ca6
rockchip: rv1126: make fit: simplify the script
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I28d3bf6816a28c3cf460db83d726a5506a3179da
2020-07-29 15:30:53 +08:00
6011dca578
rockchip: remove rv1109 support
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I2f3d771a049195b6f1e26c5873bc2249bb643a99
2020-07-28 09:18:22 +08:00
2031371827
rockchip: resource: initial hash_size as 0
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: If2c7c8890dc1d29610c2ba871e3e9c5a1df57dc7
2020-07-28 09:18:22 +08:00
2a93187938
rockchip: kernel_dtb: fix compile issue
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A careless mistake.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I5ea26a44af23bdd8cdc5eb1ba08674193a07045e
2020-07-28 09:18:22 +08:00
83cb3f6b8a
rockchip: rv1126: make fit: add uncompressed data hash node
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I80545daf9b42c1154a929afc601318d66ad76c86
2020-07-27 20:06:36 +08:00
6c625d1e8c
rockchip: weak: support check uncompressed data hash
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I04c54daa0d8bc43566c7b59a390b5c2789cf1425
2020-07-27 20:06:36 +08:00
ed670690bb
rockchip: dts: rv1126: add resets property
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I16554cd94fd43fd975b62a8101ae13cc9d20072b
2020-07-27 11:22:37 +08:00
77827e2e47
rockchip: boot_mode: short the message
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I471943cc4c1598af5d56e95eea010fc3eaef9578
2020-07-24 18:05:13 +08:00
Joseph Chen
Jon Lin
Sugar Zhang
Ziyuan Xu
Nickey Yang
Elaine Zhang
Tang Yun ping
Finley Xiao
Jason Zhu
Elon Zhang