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13693 Commits

Author SHA1 Message Date
Jon Lin 8d4402d317 mtd: spinand: Support new devices 
XT26G04C

Change-Id: I9004728fc1dfd03a54578fbf344171c4bdc3d69d
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2021-02-22 14:53:05 +08:00
Sandy Huang 7bdd0eb669 drm/rockchip: vop2: only port0 support RGB 10BIT output 
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I51c5a25705d2cf7ecd05f9ae5e82b98f4536a698
 2021-02-21 17:24:41 +08:00
Guochun Huang 10bd57236c video/drm: display: add support swap two channel data of MIPI 
Change-Id: I44630143c7d59a0a7deff4d7b9ee690b621d1a0f
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
 2021-02-21 17:03:11 +08:00
Jason Zhu c90ee5c73d rockchip: spl: support low power detect 
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Ibcb5996369348d31248596dcdb5018ad6526786e
 2021-02-21 15:41:23 +08:00
shengfei Xu c056ffb327 fuel gauge: rk817/rk809: add for spl 
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I700d796d2b506c7defad416feba1074de185441c
 2021-02-21 15:41:23 +08:00
Joseph Chen dd3fa9997d drivers: Makefile: use more strict name to add modules 
Allow modules to be omitted from CONFIG_SPL_POWER_SUPPORT.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Iaa3291d8bfc99c24ac01897fccb9ea7d6677927d
 2021-02-21 15:41:23 +08:00
Joseph Chen 743acd001a power: pmic: add config SPL_DM_PMIC 
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I43251c3802d7f3284b64ff9da728741d8d587255
 2021-02-21 15:41:23 +08:00
Sandy Huang 2b2e3d7041 drm/rockchip: vop2: add support rk3566 
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Iab0e2f626a0a6ce765bf584a7b815268a338cb85
 2021-02-21 15:39:27 +08:00
Guochun Huang b014c5e23f video/drm: display: rk356x series drive mipi pixdata on posedge 
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: I4494ca32618be93aa53907800ce08780f966e137
 2021-02-21 15:17:44 +08:00
Wenping Zhang 9876686da0 video/rk_eink: add virtual width and height support. 
Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
Change-Id: I60f026b0aa2ac62b6827675a7e780418d0928386
 2021-02-21 14:22:49 +08:00
Guochun Huang 20618a45d9 video/drm: display: fix display route for compatibility 
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: I70e237967d2074d5a341d86f69c2791b5ba183ff
 2021-02-21 14:22:13 +08:00
Guochun Huang 63f3640c3a video/drm:: dsi: the max bit rate is 1.2Gbps per lane in rk3568 
Change-Id: I7a9c7fe6eeb57a23694761b4a6ad61d05e52dd07
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
 2021-02-21 10:44:44 +08:00
Jon Lin 1f161166c6 mtd: spinand: Support GD5F4GQ6UExxG 
Change-Id: Ib72399ca0166ec82fdaf900ac51059076c155de3
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2021-02-06 12:07:57 +08:00
Joseph Chen f06413e433 cpu: rockchip amp: support set PE state 
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I6b5eb621af1472983cdfbaebfdaa61a4c85b1856
 2021-02-05 17:57:00 +08:00
Sandy Huang 52ee18acb8 drm/rockchip: vop2: add support port1 to mipi dsi 
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Iee86d5da9df9ae185b261a46e3919375f8f0fd2d
 2021-02-05 11:21:55 +08:00
Yifeng Zhao 0bcaecc8ee drivers: dfu: add DFU to read and write to MTD base storage 
Add DFU to read and write to MTD base storage.

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I84cb160b182c31d7f84ed700896a4970845a3ca8
 2021-02-04 17:24:07 +08:00
Yifeng Zhao ca42250799 drivers: usb: add usb pid for dfu 
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Id823187c0b74fe99c4fdff7fdb85f6d995ed9d28
 2021-02-04 17:19:48 +08:00
Joseph Chen 3f0522ce8f rng: rockchip: add hardware rand library 
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Id22c5725158d86cc8a2ff80fdf09b0146d04be41
 2021-02-03 17:47:51 +08:00
Jason Zhu 6221c090c7 dm: mmc: add more conditions to judge whether print the info 
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I94f60c9102c8708d7fa84e729762bfe2956d4fd5
 2021-02-01 10:21:45 +08:00
Jon Lin cc7b616de8 mtd: spinand: Enable FM25S02A QE bits 
Change-Id: I247212779443f0166a633968203824e6552d669e
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2021-02-01 10:21:30 +08:00
Lin Jinhan a3341e9017 drivers: crypto: drop rng api from crypto driver 
rng module is not belongs to crypto driver anymore.

Change-Id: I6d837397621267edb586034ff87b82fc33a30d5b
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
 2021-01-30 09:02:02 +08:00
Lin Jinhan 3ebc872de9 UPSTREAM: rockchip: rng: Add a driver for random number generator(rng) device 
Add a driver for the rng device found on rockchip platforms.
Support rng module of crypto v1 and crypto v2.

Change-Id: I5be779aa08452977965d032e366f4e36c930b12e
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
(cherry picked from commit b072d00c225e5b8147ed7444ebeae4ddd336870b)
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
 2021-01-29 17:50:52 +08:00
Sughosh Ganu 28507ac336 UPSTREAM: dm: rng: Add random number generator(rng) uclass 
Add a uclass for reading a random number seed from a random number
generator device.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
(cherry picked from commit a2487684003b0bc380955e1a38cdd71da3ca4366)

Change-Id: Ife2287132db695181d663653f2ceaab0e343b41f
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
 2021-01-29 17:50:52 +08:00
William Wu 631619a42f usb: dwc3-generic: support host mode if dr_mode is otg 
The Rockchip DWC3 controller only support DRD mode (Dual Role
Device), but not support OTG mode. So if the dr_mode in DTS is
configured to OTG, then we force it to Host mode. This patch
does not affect the device function of OTG, such as rockusb.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I806623aa9b0bb8b595417755db7d9c6b6c4f38f1
 2021-01-29 14:57:09 +08:00
Wenping Zhang 074c7ac45f video/rk_eink: Don't read image from emmc to ddr if it's already loaded. 
Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
Change-Id: I02b141e5adb8391bf85ce77c6a7e280f645c96d5
 2021-01-28 09:33:56 +08:00
Joseph Chen b978e52ca5 power: pmic: rk8xx: inactive pmic_sleep by default 
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ia5729341c5a94d0109a8a28e48ad8eb79b80962e
 2021-01-27 17:11:30 +08:00
Joseph Chen 06b61291ba power: charge animation: add pmic suspend/resume 
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ia1b6d232b0a9c0d0ce2e8ee47ae84aaa6d40bfac
 2021-01-27 17:11:30 +08:00
Joseph Chen 40db74046c power: pmic: rk8xx: implement suspend/resume callback 
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I46b13886fcb3e7733155cd6f5fce15473c439da3
 2021-01-27 17:11:30 +08:00
Joseph Chen 2a7051be6c dm: pmic: add suspend/resume callback 
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Iaa3b0b7f7b3a0563370baace876e095deb64c28f
 2021-01-27 17:11:30 +08:00
Jason Zhu 327b5d5723 dm: mmc: print the cmd index when sending cmd error occur 
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I08aab678c5e539000fadccf4a8ad9e97e3693894
 2021-01-21 18:12:47 +08:00
Jason Zhu 34d21c9ad8 UPSTREAM: mmc: dw_mmc: Calculate timeout from transfer length 
The current 4-minute data transfer timeout is misleading and broken.
Instead of such a long wait, calculate the timeout duration based on
the length of the data transfer. The current formula is the transfer
length in bits, divided by a multiplication of bus frequency in Hz,
bus width, DDR mode and converted the mSec. The value is bounded from
the bottom to 10000 mSec.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I168b6ceba917d3e621559a92a63fac78abca6bff
(cherry picked from commit 4e16f0a67d80b4ce11995b870b5d9c8d11266d0d)
 2021-01-19 16:57:34 +08:00
Jianqun Xu 7862d7bff3 UPSTREAM: core: uclass: fix to u32 for phandle of fdt 
The function has a little fix during upstream review, do fix to sync
with upstream.

Change-Id: I9e1c43a660b2f83395d1639aa962988ca04494e5
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
 2021-01-19 10:01:24 +08:00
Jon Lin 2a2a073c3c mtd: spinor: mx25u25635f enable quad read 
Change-Id: I66ef7cf13b58b1a3c2a4e8ea78c1c3a8090c57df
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2021-01-19 10:00:57 +08:00
Jon Lin 8c4105cc49 mtd: spinand: Support BWJX08K 
Change-Id: Iddcc569cb4865bc73d0829fd5e6a33c7c85632b5
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2021-01-19 10:00:49 +08:00
Jon Lin 69bb6ffab4 mtd: mtd_blk: Only reserve for last partition with grow tag 
Change-Id: Icd3bd87b45bdb3af6688269a2332463f570f4d46
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2021-01-18 09:03:19 +08:00
Jon Lin ce9d2743ba mtd: mtd_blk: spinor reserved area aligned to 64KB 
1.reserve for GPT
2.kernel spinor erasesize is 64KB

Change-Id: I32a5b26f8f39b4b226ec54342ce5d8d3d71f1c4d
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2021-01-18 09:03:19 +08:00
Wyon Bi d63e2d24c5 video/drm: analogix_dp: Fix voltage_swing/pre_emphasis level calculation 
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I07a071b77a254cbe940b4df4dd6b52b069339076
 2021-01-15 15:58:04 +08:00
Tang Yun ping c69667e0e2 drivers: ram: sdram_common: add os reg v3 define 
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I2cedcddcebdfd32da113edd1e18d2498b5813e22
 2021-01-14 11:39:53 +08:00
Tang Yun ping 1a6462e18b drivers: ram: sdram_common: add 4rank support for sdram_cap_info 
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: Icda7bdc73e6c36c1351f0671b374a9d906dafec8
 2021-01-13 16:36:10 +08:00
Weixin Zhou 39c952ae4e video/rk_eink: add poweren for tps65185 
Signed-off-by: Weixin Zhou <zwx@rock-chips.com>
Change-Id: Icc6059a723f9e5d0b90c623497f0b03adea9e726
 2021-01-13 11:40:59 +08:00
Finley Xiao fd7b518283 rockchip: otp: Add support for rk3568 
This adds the necessary data for handling otp on the rk3568.

Change-Id: Id5e8a3a1561604bb307ef17e06d11d7e62d8a840
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
 2021-01-13 09:32:47 +08:00
Wyon Bi 8d52d662b5 clk: rockchip: rk3288: Fix i2c clk rate calc 
Change-Id: I083e2b8ceaa3eee7729174aa2e17b8a08cec9c05
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
 2021-01-13 09:00:50 +08:00
Jason Zhu a2875f15a8 dm: blk: fix spi flash uclass different error when use mtd block 
Add more condition to decide which dev is "mtd 2".
More info seen in 82ee425415.

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Iea84b5a7307969dad785f3136b0af8b9f45e94f6
 2021-01-11 11:12:58 +08:00
Shawn Lin fae486e407 power: regulator: Use dev_read_size in gpio-regulator 
Change-Id: Iff2e643d6dad6975fe0838dc439a31ecd5299f41
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
 2021-01-08 09:24:05 +08:00
Yifeng Zhao 7cd717205f drivers: rknand: zftl: fix to support samsung ss14 8GB NAND FLASH 
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I86d47db8988b56d36ae76d08997c840b34f0b0d8
 2021-01-07 10:39:27 +08:00
Shawn Lin bc58f2110b drivers: pci: Add Rockchip DesignWare based PCIe controller 
=> pci enum
PCIe Linking... LTSSM is 0x1
PCIe Link up, LTSSM is 0x230011
PCIE-0: Link up (Gen3-x2, Bus0)

=> pci scan
Scanning PCI devices on bus 0
BusDevFun  VendorId   DeviceId   Device Class       Sub-Class
_____________________________________________________________
00.00.00   0x1d87     0x3566     Bridge device           0x04

=> pci 1
Scanning PCI devices on bus 1
BusDevFun  VendorId   DeviceId   Device Class       Sub-Class
_____________________________________________________________
01.00.00   0x144d     0xa808     Mass storage controller 0x08

=> nvme scan

=> nvme details
Blk device 0: Optional Admin Command Support:
        Namespace Management/Attachment: no
        Firmware Commit/Image download: yes
        Format NVM: yes
        Security Send/Receive: no
Blk device 0: Optional NVM Command Support:
        Reservation: yes
        Save/Select field in the Set/Get features: yes
        Write Zeroes: yes
        Dataset Management: yes
        Write Uncorrectable: yes
Blk device 0: Format NVM Attributes:
        Support Cryptographic Erase: No
        Support erase a particular namespace: Yes
        Support format a particular namespace: Yes
Blk device 0: LBA Format Support:
Blk device 0: End-to-End DataProtect Capabilities:
        As last eight bytes: No
        As first eight bytes: No
        Support Type3: No
        Support Type2: No
        Support Type1: No
Blk device 0: Metadata capabilities:
        As part of a separate buffer: No
        As part of an extended data LBA: No

=> nvme info
Device 0: Vendor: 0x144d Rev: EXD7201Q Prod: S444NA0M384608
            Type: Hard Disk
            Capacity: 244198.3 MB = 238.4 GB (500118192 x 512)

=> nvme device 0

=> md.l 0x40000000 1
40000000: d08ec033                               3...
=> mw.l 0x40000000 0x55aa55aa
=> md.l 0x40000000 1
40000000: 55aa55aa                               .U.U

=> nvme write 0x40000000 0x0 0x1

nvme write: device 0 block # 0, count 1 ... 1 blocks written: OK

=> md.l 0x44000000 1
44000000: ffffffff                               ....
=> nvme read 0x44000000 0x0 0x1

nvme read: device 0 block # 0, count 1 ... 1 blocks read: OK

=> md.l 0x44000000 1
44000000: 55aa55aa                               .U.U

Change-Id: I645dfc7e88722e9948ecb6e1a3a589eb4b420c1f
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
 2021-01-07 10:00:59 +08:00
Shawn Lin 76ab734171 phy: Add Rockchip Synopsys PCIe 3.0 PHY 
Change-Id: Ie29e4777f8f0603b779cc3387dc5c4b63336deff
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
 2021-01-07 10:00:59 +08:00
Shawn Lin 80907d3c4c core: device: Add PCIe to bind list if we set GD_FLG_RELOC 
Change-Id: Ib115bc6eb52f8a08e28805ea15e2cbf8f27f5f63
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
 2021-01-07 10:00:59 +08:00
Shawn Lin d504dfb2b1 clk: rockchip: rk3568: Ungate PCIe30phy refclk_m and refclk_n 
Change-Id: I718f280cd78235131f3f3ef76e17e498a6e4db8e
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
 2021-01-07 10:00:59 +08:00
Shawn Lin cd282fabfa power: regulator: Migrate to dev_read_u32_array for gpio-regulator 
fdtdec_get_int_array_count is obsoleted and we should use
dev_read_u32_array for seeking node members.

Change-Id: I666bd7317cfa203229454d24c910049c24bf8a2f
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
 2021-01-07 10:00:59 +08:00