This does not appear to be used by any boards. Before introducing a new
log system, remove this old one.
Change-Id: I798cd4aff50b7136ae9f84362185f9f73b04f710
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit c5404b64fb5a35d41f7eff6d12b8ffdb0c851040)
With clang this gives a warning because hubsts appears to be used before
it is set, even if ultimately it is not used. Simplify the code to avoid
this problem.
Change-Id: If765f7b0c909de125e163875856e43ddf9b6c5d5
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 0ad0458c76107b29325b8c38804e0407bed42a79)
The SPL must be located at 8kB (16 sectors) offset. That's right in the
middle of the GPT, so we need to define a smaller amount of partitions to
accomodate for that location.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Change-Id: I7932a388389b15237bed18321606f034a47534a3
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 5dc0256d1210cb38ba11b22a8eb2ccc101460963)
On some SoCs, the SPL needs to be located right in the middle of the GPT
partition entries.
One way to work around that is to create partition entries for a smaller
number of partitions to accomodate with where the SPL will be. Create a
Kconfig option to allow to do that.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Change-Id: Ic06f18722c0a835829042540f1f7a4364924624d
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 4ce521977f79a883f9c47984ef675c4b2267b7ad)
sdram sub command of i2c command does not support Drivers Model.
This adds Drivers Model support to sdram sub command.
Change-Id: I405d05b9b697715759a68ba71597cd9ae63d9565
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 28df8ed07f2ae936e9af28c146d555ed4d0c122a)
Typo fix: CONIFG->CONFIG
Change-Id: Ib4a1e77aacf0bc3cae32158623c3805cd279fd9f
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 448df354b0725093f857e15a4ab5e849c4ecf3e0)
To page mapping the lowest 2 bits needs to be 0x3.
If not fix this, the final lowest 3 bits for page mapping is 0x1
which is marked as reserved.
Change-Id: I5ac722421b46514736d93452aab68debe8aabfe5
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 90351547ceeb76c1337757c51af0fb5a2c30bd02)
After relocation, when error happends, it is hard to track
ELR and LR with asm file objdumped from elf file.
So subtract the gd->reloc_off the reflect the compliation address.
Change-Id: I1db18049b1e895c74ec75ed6ce77231cf4f03bce
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 082693f4f02ad7a9de192e73feae34e28856b8e3)
Now, lib/libfdt/fdt_wip.c is the same as scripts/dtc/libfdt/fdt_wip.c
Change the former to a wrapper of the latter.
Change-Id: Ifce4c63db38146297c14218ef94d226bf6e3bb27
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 26e961c8cfdff00c5c9389d301d9a2eb10eb844c)
All the other fdt_*_region() functions are located in fdt_region.c,
while only fdt_find_regions() was added to fdt_wip.c, strangely.
Move it to the suitable place.
Change-Id: I463419815b4132b6e39b5b02a857126201a854fb
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 87be1e9fb4dcc130e90d497cc5ce49c715efc6c2)
In the moment our exception entry code needs 34 instructions, so we
can't use put it directly into the table entry, which offers "only"
32 instructions there. Right now we just put an unconditional branch
there, then use a macro to place the 34 instructions *per entry* after
that. That effectivly doubles the size of our exception table, which
is quite a waste, given that we use it mostly for debugging purposes.
Since the register saving part is actually identical, let's just convert
that macro into a function, and "bl" into it directly from the exception
slot, of course after having saved at least the original LR.
This saves us about 950 bytes of code, which is quite a relief for some
tight SPLs, in particular the 64-bit Allwinner ones.
Change-Id: I3d156413396f2a304773ef3a202f73d47cf65531
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 78ad457b2dbd0fe6cdc7ea42a69774a72ed007b9)
The DCLK_VOP_DIV_CON_MASK should cover only bits 8 through 15.
Fix this to remove an "integer-overflow on shifted constant" warning.
Fixes: 9246d9e ("rockchip: rk3128: add clock driver")
Change-Id: I6132623ce069ec6c6cd59a01580e795142864862
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 4fc495e9e2e497afee383294a6ee9212e9a8bd73)
The PLL selector field for NANDC is only 2 bits wide.
This fixes an 'int-overflow on shift' warning.
Fixes: 9246d9e ("rockchip: rk3128: add clock driver")
Change-Id: I4d6d7c51633eb7cd0fbfb1c6b7c501cf8c0fcf81
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit cd401abcd532c59cdaaf6ffeed762386c1813e58)
On the RK3399-Q7, we want to trigger a full platform reset (so the
various software stacks supported don't have to deal with the same
complexities over and over again) in case that anything other than a
power-on reset occurred.
To do so, this defines the /config/sysreset-gpio property and has it
point to a GPIO that will perform a power-on reset of the entire
platform.
Change-Id: Ic7e6b6871da4064c8ea4a5e62d5b55dfd80cf3e8
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 5f104178bf713615dc404fdfcf0fb53d89c66a07)
The reset circuitry in the RK3399 only resets 'almost all logic' when
a software reset is performed. To make our software maintenance
easier in the future, we want to have the option (controlled by a DTS
property) to force all reset causes other than a power-on reset to
trigger a power-on reset via a GPIO trigger.
This adds the necessary support to the rk3399-puma (i.e. RK3399-Q7)
board-support and the documentation for the new property
(sysreset-gpio) within the /config-node.
Change-Id: If51b78c2ef6ca929c2d108346e21697f7e9b36db
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit ae0d33a7291a164a11ae034bcf4f71226b2bef48)
USB1 is connected to the on-module USB 3.0 hub and power to the hub
(actually it's a reset signal, modeled as a fixed regulator, that will
be released) should be enabled only during the first probing of the
device to avoid the hub from entering its low-power mode (where it
tries to attach on a fixed interval, but we always miss the timeslot
when U-Boot has the controller listening).
This adds a 'tsd,usb-port-power' stringlist to enable the
infrastructure in the board-specific usb_hub_reset_devices to find and
control the fixed regulator associated with control of the USB hub.
Change-Id: I6624aa6b0a847eb0d26013b5cda5e26edc3630f5
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 884ad05d34c49ac6c8e21346a63a627c6c9d4c52)
For some versions of the RK3399-Q7 (at least revisions v1.1 and v1.2
are affected), we need to turn on the power for the port connected to
the on-module USB hub only when the device is probed for the first
time to ensure that the hub does not enter a low-power mode (that
U-Boot's USB stack can't deal with).
Note that this is needed for U-Boot only, as Linux eventually manages
to attach the hub even when it has entered into its low-power state
(when the hub wakes up the next time) after a few seconds.
Change-Id: I4eca5fe6953ae77ff12c45248d156de4a890803c
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 614539d4f79669413e3336f349c487b605f2bb6b)
With some of the recent cleanups (e.g. moving the DRAM controller
drivers for Rockchip devices to drivers/ram/rockchip), the files
and paths listed in MAINTAINERS no longer covered what really is
looked after as part of the Rockchip port.
This commit updates the files/paths listed in MAINTAINERS for the
Rockchip port. I am certain, though, that this will have missed some
additional paths that should have been included...
Change-Id: I6ad5101bff84f5e33086626c28d20aaab8693c8a
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 8b45193a2243c2e86e0c473e74bad7b08072b522)
GCC 7.1 seems to be smart enough to track val through the various
static inline functions, but not smart enough to see that val will
always be initialised when no error is returned. This triggers
the following warning:
env/mmc.c: In function 'mmc_get_env_addr':
env/mmc.c:121:12: warning: 'val' may be used uninitialized in this function [-Wmaybe-uninitialized]
To make it easier for compiler to understand what is going on, let's
initialise val.
Change-Id: I9e78b4a72f8124bde37946aaad0caa82c064ec70
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit fd374665c9b724bb3eb0da32db0bb7ecc5cf1337)
It is unwise to first dereference a variable
and then to check if it was NULL.
Change-Id: I2c28e092380c649874fab06f0b4e453466e2d16c
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 24f48416dfe1d827dcf759d6cd0e7a8e5c67e321)
Remove an unreachable return statement.
Change-Id: I523a83571eade593a08b685519757c1df4ffab25
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 254eedee7f383066b70ac4da01bc792a3256a4b3)
It is legal to have multiple /memory nodes in a device tree . Currently,
fdtdec_setup_memory_size() only supports parsing the first node . This
patch extends the function such that if a particular /memory node does
no longer have further "reg" entries and CONFIG_NR_DRAM_BANKS still
allows for more DRAM banks, the code moves on to the next memory node
and checks it's "reg"s. This makes it possible to handle both systems
with single memory node with multiple entries and systems with multiple
memory nodes with single entry.
Change-Id: Idc8b4bebc916b6a6bc0d2deb3c4008921d268d1e
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 942ee0933e881ff500aae7e42309bf6abbc495d4)
Same macros are defined in various places. Collect them into
include/linux/bitops.h like Linux.
Change-Id: I81d12e8c8151c6eb29499d2b5cd61ed782500492
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit ed3986ca30972c94f0076f88c948406ce030a05c)
The patch is adding external pmufw "Platform Management Unit firmware"
to boot.bin image. Boot.bin is a Xilinx format which bootrom is capable
to read and boot the system. pmufw is copied to the header data section
follows by u-boot-spl.bin. pmufw is consumed by PMU unit (Microblaze)
and SPL runs on a53-0.
This is generated command line when PMUFW_INIT_FILE is setup.
./tools/mkimage -T zynqmpimage -R ./"" -n
./"board/xilinx/zynqmp/pmufw.bin" -d spl/u-boot-spl.bin spl/boot.bin
Change-Id: I74fc17513dd99b876ab9c08ded6ad41a7b0cd3de
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit c85a6b79d10ed8a098997370cbc4fb233ddcb13b)
The boot (and fallback/emergency boot) concept for the RK3399-Q7
differs from Rockchip's reference platforms.
On the RK3399-Q7, some of this functionality is present in the
bootloader itself (and configurable); some is backed in hardware by
the Qseven BIOS_DISABLE signal to invoke the final stages of fallbacks
(i.e. either an external boot bypassing on-module memories or falling
back to the BROM for USB recovery).
In summary: the ADC-based boot_mode check does not apply for the
RK3399-Q7 and we therefore disable it (in this commit) by setting
CONFIG_BOOT_MODE_REG to 0.
Change-Id: Iad0aace3a6f789c7fbed55fe73480572b33df824
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit e5ee24dda20af5dc87971b497268f9fb1c83027e)
The ROCKCHIP_BOOT_MODE_REG option defaults to a hex value, so 0 will
show as 0x0 if a default is provided and changed via Kconfig.
However, it still will show as 0, if no default is given.
Consequently, the "is set to something other than 0" test in a
Makefile is cumbersome. Instead this check can easily be performed in
the C-code.
This removes the ifeq-check from mach-rockchip/Makefile, adds a
matching #if-check to boot_mode.c and fixes resulting link issues (if
boot_mode.o was not included due to the Makefile check) by defining a
stub function (in case the functionality is not built in) for
setup_boot_mode in boot_mode.c.
Fixes: e306779 (rockchip: make boot_mode related codes reused across all platforms)
Change-Id: I5299469103d139a90b8c073779d872ef131c3b42
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit f07d76c00d1fe05baad1599d01d07a9226498923)
As discussed with Marek, this adds myself as the maintainer to
offload the USB xHCI part.
Change-Id: Ib53bd69e33e86faeb27291c5f3ebddc8d7433467
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit c0c5f910adbe703aa3d353fbf2c63e9ebc779943)
Increase the buffer length to be just above maximum permissible value
of 128 kiB . This increases the performance of the UMS and alike by a
factor of 2 - 2.5 as the buffers are less fragmented.
Change-Id: I8b285031fd251b2ebf672c2295a19bfcba77d8c6
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit a8c402f45c758235916615757ac537db8e96fc31)
When usb_hub_reset_devices is called, it should be passed both an
indicator which hub it should operate on and what port number (local
to that hub) should be reset.
Previously, the usb_hub.c code did not include such context and
always started resets from port number 1, performing multiple
reset-requests for the same devices:
/*
* Reset any devices that may be in a bad state when applying
* the power. This is a __weak function. Resetting of the devices
* should occur in the board file of the device.
*/
for (i = 0; i < dev->maxchild; i++)
usb_hub_reset_devices(i + 1);
This adds an additional 'hub' parameter to usb_hub_reset_devices
that provides the context to fully qualify the port-number in.
Existing implementations are changed to accept and ignore the new
parameter.
Change-Id: I2f201cb9c52522f6e553cbf54aae9bbb2e549a21
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 883946e8e7c5dacb5e12f18703e20d49a4886f0e)
Its a valid use case to call ehci_submit_async() with a NULL buffer
with length 0. E.g. from usb_set_configuration().
As invalidate_dcache_range() isn't able to judge if the address
NULL is valid or not (depending on the SoC hardware configuration it
might be valid) do the check in ehci_submit_async() as here we know
that we don't have to invalidate such a buffer.
Change-Id: If8d1ee336c3123356138551ed4cbb556e26bf4ed
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit b3cbcd902db7019410dfe3729a660abcb1f03ffb)
Currently we check in ehci_shutdown() if ctrl is NULL after
dereferencing it.
Before this we have already dereferenced ctrl, ctrl->hccr,
and ctrl->hcor in ehci_get_portsc_register(), ehci_submit_root(),
and hci_common_init().
A better approach is to already check ctrl, ctrl->hccr, and ctrl->hcor
during the initialization in ehci_register() and usb_lowlevel_init()
and signal an error here via the return code.
Change-Id: I940999cbb94fbae4642fd25df820997c4d642da1
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 45157d27644c23493ea1b5a6c9dd67572eb75c8c)
Commit 9000eddbae ("drivers/usb/ehci: Use platform-specific accessors")
broke USB 2.0 on big-endian platforms because for them writel/readl()
does automatic conversion of BE data to LE.
Proper implementation requires to use "raw" variant of these accessors
which read/write data without messing with endianess.
While at it replace cpu_to_be32() to be32_to_cpu() in readl() to
keep sane semantics.
Change-Id: I35e193f08aa56967c831bce1b2892e2c51527796
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Marek Vasut <marex@denx.de>
Reported-by: Vladimir Boroda <boroda@yahoo.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 9829ce2ff25c659ca29cd15ab773312ac4b6cfc6)
Usb tree/info commands iterate over all usb uclass devices recursively.
Blk uclass devices based on struct blk_desc are created for mass storage
device, treating them as usb uclass devices based on struct usb_device
and referencing usb config interface descriptors cause crash.
To fix, ignore blk and usb_emul uclass devices in usb_show_info
and usb_tree_graph. Also avoid addition of preamble for blk uclass
child devices, otherwise tree dump gets messed up.
Change-Id: If25ca43b08c0918c44583f71282a07c928e5bf53
Signed-off-by: Suneel Garapati <suneelglinux@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit abd7cedb19ab7979467734b3933a39879bd8935a)
The RK3399 has a total of 9 I2C controllers. To support these, the
enum in periph.h is extended and the mapping from the IRQ numbers to
the peripheral-ids is extended to ensure that pinctrl requests are
passed through to the function configuring the I2C pins.
For I2C8, the pinctrl is implemented and tested (on a RK3399-Q7) using
communication with the FAN53555 connected on I2C8.
Change-Id: I7ad9400f05d3ee89263ecd2bcc391483934b6c74
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 8c2bb589e29d5cb89e10c3ddd23b28d949fa9693)
The RK3399 clk driver still has a left-over use of extract_bits, which
can be replaced by using bitfield_extract from include/bitfield.h.
This rewrites the invocation to use the shared function.
Change-Id: Ia541e82ffce50d0f2a43928530ecece66ae1cd17
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit a8ee98df183ed240afb5220c3cdf2991f69fa578)
A minor code-size increase from the changes for tracking the os-type
of FIT images and from infrastructure for recording the loadables into
the the loaded FDT, broke the builds for sun50i and some OMAP2+ devices.
This change adds a new config option (enabled by default for
MACH_SUN50I, MACH_SUN50I_H5 and ARCH_OMAP2PLUS) that does skips these
processing steps (bringing code size down to below the limit
again). The os-type is not evaluated, but assumed to be IH_OS_UBOOT
(i.e. taking the code-paths intended for backward-compatibility).
Note that enabling this config option precludes any useful downstream
processing, such as utilising a special calling convention for ATF or
OPTEE, based on the os-type of the loadables.
Change-Id: I32036975208be6e9d9d2ad3b5376444efd693f25
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 337bbb6297775e8e9d664e96e96004f00d1d8c02)
This tracks the SPL changes for ATF for the RK3368-uQ7:
* renames ATF_SUPPORT to ATF
* drops CONFIG_SPL_ATF_TEXT_BASE (now dynamically retrieved from
the .itb file)
Change-Id: Ibb5c0769d20edf7e80d2fbf420f5a58bd4b4ef03
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit ec4bf3d6bd5ebc01d2664560b1e79e36994f6c1d)
This defconfig update makes use of the new features:
* CONFIG_ROCKCHIP_SPL_RESERVE_IRAM is now set to 0, as there is no
overlap between the M0 firmware and the ATF (we load this to DRAM
and relocate it to its final location within the ATF)
* tracks the ATF_SUPPORT -> ATF renaming
Change-Id: I91dca4f1b51701a00eef67114793633c334ed84c
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit cba7b949b4a2ebceabf6adde04eb9f67f71c7ee4)
For the RK3368-uQ7, we can now update the .its file to mark the
Trusted Firmware as out 'firmware' bootable and annotate both ATF and
U-Boot with an OS-type.
Change-Id: I637ee137e1ea361ec198425e0e1b14c26343d913
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit b07856fe436a6ccf20c6176cd450a4c4487973a1)
This commit updates the .its file for the RK3399-Q7 to use the new
features and demonstrates how to use those:
* it marks the ATF as the 'firmware'
* it tracks the OS-type for U-Boot and ATF
* it loads the PMU (M0) firmware to DRAM and records the location
to /fit-images (where our ATF reads it from)
With the handoff of the next-stage FDT to ATF in place, we can now use
this to pass information about the load addresses and names of each
loadables to ATF: now we can load the M0 firmware into DRAM and avoid
overwriting parts of the SPL stage. This is achieved by changing our
.its-file to use an available area of DRAM as the load-address.
Change-Id: Iff9e14ecaa7eb01b40498880a34f8fc87bda0090
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit fc76fa3cfa3fa716bf541f30977896fd6656b148)
This tracks the SPL changes for ATF for the Firefly:
* renames ATF_SUPPORT to ATF
* drops CONFIG_SPL_ATF_TEXT_BASE
Change-Id: I3e386320f689b010344a0f1c8ca87fe9bcc0d075
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit cd5eae5590fcf8529ff0b2268db0968558842218)
Having CONFIG_SPL_ATF seems more natural.
Rename it, while it it is easy and there's few boards that use it
(only RK3399 and RK3368 boards).
Change-Id: Ie13ba6eeb687bf6f8c8d326c197f453fb752e9bd
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit aa122f6b3d24bd133392c7dd2a882a8cc2cbd622)
This adds a new interface spl_invoke_atf() that takes a spl_image_info
argument and then derives the necessary parameters for the ATF entry.
Based on the additional information recorded (into /fit-images) from
the FIT loadables, we can now easily locate the next boot stage.
We now pass a pointer to a FDT as the platform-specific parameter
pointer to ATF (so we don't run into the future headache of every
board/platform defining their own proprietary tag-structure), as
FDT access is already available in ATF.
With the necessary infrastructure in place, we can now update the
support for the ARM Trusted Firmware to dispatch into the
spl_invoke_atf function only if a IH_OS_ARM_TRUSTED_FIRMWARE image is
loaded.
Change-Id: Ia00abe207a0a0fed044fcda2b6e1054225b42901
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 1d3790905d9c089b434c376f2dcc585b6a92bc99)
If a FDT was loaded (e.g. to append it to U-Boot image), we store it's
address and record information for all loadables into this FDT. This
allows us to easily keep track of images for multiple privilege levels
(e.g. with ATF) or of firmware images preloaded into temporary
locations (e.g. PMU firmware that may overlap the SPL stage).
Change-Id: Ifeee692ad0604e2e60e92f76a11f5693c52fe769
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit a616c783f22a045e580f101141a9d62775f97365)
During the loading of more complex FIT images (e.g. when the invoked
next stage needs to find additional firmware for a power-management
core... or if there are multiple images for different privilege levels
started in parallel), it is helpful to create a record of what images
are loaded where: if a FDT is loaded for one of the next stages, it
can be used to convey the status and location of loadables.
This adds a fdt_record_loadable() function that can be invoked to
record the status of each loadable below the /fit-images path.
Change-Id: I9d6dcd3cb7863a558ebde7c68bcfe45eaadcc76f
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 9f45aeb937275960405de0f2abca8c665dbb03d4)
To better support bootin through an ATF or OPTEE, we need to
streamline some of the logic for when the FDT is appended to an image:
depending on the image type, we'd like to append the FDT not at all
(the case for the OS boot), to the 'firmware' image (if it is a
U-Boot) or to one of the loadables (if the 'firmware' is an ATF, an
OPTEE, or some other image-type and U-Boot is listed in the
loadabled).
To achieve this goal, we drop the os_boot flag and track the type of
image loaded. If it is of type IH_OS_U_BOOT, we append the FDT.
Change-Id: Ic7c4b927b4ad7d33e372e63002072fe27a88292f
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: York Sun <york.sun@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit d879616e9e64cf5a9c43dedc30677aa2fa463d64)
Mainly a stylistic change: convert the load_addr and entry_point
fields of struct spl_image_info to uintptr_t (from ulong).
Change-Id: I1e0f0dfa5048fcd2d5c42d6a759a5ec25ef80089
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit f2efe6786eeaa2305353a01056ffef55ae520b7d)
When loading a full U-Boot with detached device-tree using the SPL FIT
backend, we should store the address of the FDT loaded as part of the
SPL image info: this allows us to fixup the FDT with additional info
we may want to propagate onward.
Change-Id: Ifea4abd01296460570e01c1b19bd8f702e1e95bf
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 75014470aec60580978962071972f2962695938d)
To boot on ARMv8 systems with ARM Trusted Firmware, we need to
assemble an ATF-specific parameter structure and also provide the
address of the images started by ATF (e.g. BL3-3, which may be the
full U-Boot).
To allow us to identify an ARM Trusted Firmware contained in a FIT
image, this adds the necessary definitions.
Change-Id: If9f54a8391bba18c5aa220aea09db53271ff4517
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 4914af1286c4a48cd0ae98cf6adea3569111413b)
The tool has changed slightly since it was originally written. Update the
tests to suit.
Change-Id: I6935a7c4cc16e1a3e5c617133b12d1982e640c74
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit aab660fe18ac24ee859a203f517f939685af5e10)
Simon Glass
Maxime Ripard
Nobuhiro Iwamatsu
Peng Fan
Masahiro Yamada
Andre Przywara
Philipp Tomsich
Heinrich Schuchardt
Marek Vasut
Michal Simek
Bin Meng
Marek Vasut
Dirk Behme
Alexey Brodkin
Suneel Garapati