qiurui
/
rv1126-uboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
51,348 Commits 1 Branch 0 Tags 137 MiB
Commit Graph

25 Commits

Author SHA1 Message Date
Yifeng Zhao 5f73fdb14a rockchip: rk3568: support usbplug 
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: If2c56d1db774f79689cfbe87bcae7cfcadacae82
 2021-02-04 20:34:20 +08:00
Joseph Chen f345af8b36 rockchip: rk3568: add AArch32 build support 
SPL and TPL is still in AArch64 mode.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I4768903d1dbdd06359eb196607b67fb128dea644
 2021-02-04 15:05:57 +08:00
William Wu b23020efaf rockchip: rk3568: set usb2 phy0 and phy1 in suspend mode 
This patch set the USB 2.0 PHY0 port0 and PHY1 port0 and
port1 in suspend mode to save power. And set the USB 2.0
PHY0 port0 for OTG interface still in normal mode.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I684e3bf8ce7934402e745ea7cfe110b987f5d9db
 2021-01-28 15:04:41 +08:00
Jon Lin f7a0277a1d rockchip: rk3568: Enable FSPI secure 
Change-Id: Id46debc74bfac7060244079582b06b35817b51cd
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2021-01-19 15:54:36 +08:00
Shawn Lin cda11ee6a9 rockchip: rk3568: Map PCIe MMIO regions for CPU 
Change-Id: Ieb5ce1ae68e26beba9b1e73548c5db630deb1487
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
 2021-01-07 10:00:59 +08:00
William Wu edaca8fc29 rockchip: rk3568: assert reset the pipephys to save power 
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: Ie2df9df2a7312debf215276450476537f5c29bad
 2020-12-30 16:04:06 +08:00
Tang Yun ping 9ff9a8fead rockchip: rk356x: setting ebc priority to 0x3 
Enable all power domain except npu and gpu.

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I3757b8770b6d5a2a96b9d0945bbe536b6d387741
 2020-12-29 14:43:52 +08:00
Steven Liu ee1765b515 rockchip: rk3568: fix uart iomux error. 
Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
Change-Id: Ib1683c8ef40127b4fb5b0feb18778b85da47fe03
 2020-12-28 16:36:57 +08:00
Wu Liangqing 26cf79001d rockchip: rk3568: rkvdec set clk 400MHZ 
Change-Id: I3b154200fd81dab82a3c4956adf99437a51f88f9
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
 2020-12-11 15:16:03 +08:00
Elaine Zhang bf8034353d rockchip: rk3568: fixup cru node frequency 
Support 25M\50M Gmac clk.

Fixes: d83e3037ee ("rockchip: rk3568: fixup cru node for legacy
variant chip")
Change-Id: I89a535655dd01e779898188943d8f1e491c5753e
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
 2020-12-10 15:26:42 +08:00
Joseph Chen d83e3037ee rockchip: rk3568: fixup cru node for legacy variant chip 
Implement weak function: rk_board_fdt_fixup().

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Id8ef49959220b145bb9219e456a3ae00cbb6bb13
 2020-12-08 14:48:06 +08:00
Jason Zhu d6af9bf824 rockchip: rk3568: set sdmmc0 to secure 
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I8fbbc79e6e72dac688f0b46b2f961e97e80b7383
 2020-12-07 09:24:24 +08:00
Jon Lin 32b04d78e7 rockchip: rk3568: Modify fspi pins property 
Change-Id: Icc50a2087cde8a716b306e90ba4c3793883e684c
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2020-12-02 13:02:33 +08:00
Elaine Zhang 2c36608a71 rockchip: rk3568: init core pvtpll ring length 
Change-Id: I2a7957ce1c2b38dec984c6b4f36392f92c185190
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
 2020-11-21 11:29:33 +08:00
Jason Zhu d181efcb77 rockchip: rk3568: delete useless code 
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Idf90798700f1128d275d0311ed50ed531acaa42c
 2020-11-18 17:26:20 +08:00
Wyon Bi 046cd38054 rockchip: rk3568: disable eDP phy to save power 
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I4b94c5c28196f72c9d41efe7bdb9eb837eb6adf4
 2020-11-17 19:51:52 +08:00
Jason Zhu 0934588e54 rockchip: rk3568: support bring-up the mcu 
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Ib992d4ebe078d8d8752f72c8a9824e85b5f24da2
 2020-11-17 10:58:45 +08:00
Jason Zhu cce972667a rockchip: rk3568: set the emmc drive strength to level 2 
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Ic515e9aa81448ac1abcf378e9f4cd9b08247bdde
 2020-11-14 11:55:39 +08:00
Jason Zhu 3f04f6e376 rockchip: rk3568: fix compile error 
error: ‘CRU_SOFTRST_CON02’ undeclared (first use in this function)

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I64935d50646a1ca7d228308c11f2f95a2e2378bb
 2020-11-05 16:17:08 +08:00
Jason Zhu 8ae3c2c283 rockchip: rk3568: set the emmc to secure 
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I415879f184b35352bb5a53afc40100242cbeaf33
 2020-11-05 15:22:21 +08:00
Jason Zhu b3a7cb38db rockchip: rk3568: support spl_fit_standalone_release() 
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Id61a82729074348f1879b32248f6640025773db6
 2020-11-05 15:22:21 +08:00
YouMin Chen 25858e7590 rockchip: rk3568: configure UART iomux in board_debug_uart_init 
Change-Id: I02dca611a7b15dc0161dc5e65a367b038645dd9a
Signed-off-by: YouMin Chen <cym@rock-chips.com>
 2020-11-03 10:54:08 +08:00
Ren Jianing ff0e8415ac rockchip: rk3568: add <asm/io.h> head file include 
Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
Change-Id: Iadb23cf053e21983d89361e0fb81f16ca7bb129c
 2020-11-02 18:18:02 +08:00
Finley Xiao 71be53464f rockchip: rk3568: open or gate clocks automatically when perform idle 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ifb57c2f04d75a0ca925d96c423784678a609ce46
 2020-10-27 14:53:56 +08:00
Joseph Chen 7e26af3867 rockchip: add rk3568 SoC support 
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I2e163b93d4ec5a60f1ff9c589626d3ccd994f854
 2020-10-22 19:39:19 +08:00