This function prepares to read data without confirming completed.
We can use it to prefetch data and run other process.
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I76116c25dfdb7559b80a0216c414189e85409a3e
Since v2.80a, dwmmc controller introduced the card write threshold for
HS200 & HS400 mode. So CardThrCtl can be supported during write operation, not
only read operation.
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I7f345660107c2978d2f874d36f2dffd2acdfbcb6
The MMC is initialized by pre-loader or bootrom, so it is no need to
initialize it again. Open this config to skip some unused initialized
process.
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: If00fc3ce7df4d15e71ecfd8f8717a59640c3b7a9
Sometimes we need to reconfigure the eMMC gpio state in spl without
pinctrl driver. So add func mmc_gpio_init_direct to initialize the
eMMC gpio in different platform.
Change-Id: I22500f8865a9e29e59be6ff224001bad899cec48
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Since we use the aliases in U-Boot to get the MMC device order, and
sometimes we pass the spl boot device to U-Boot. This may be confused
that which MMC device is passed to U-Boot. So unify it together.
Change-Id: I8db5e90d9543004aff128322398edffad35b551b
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Thomas reported U-Boot failed to build host tools if libfdt-devel
package is installed because tools include libfdt headers from
/usr/include/ instead of using internal ones.
This commit moves the header code:
include/libfdt.h -> include/linux/libfdt.h
include/libfdt_env.h -> include/linux/libfdt_env.h
and replaces include directives:
#include <libfdt.h> -> #include <linux/libfdt.h>
#include <libfdt_env.h> -> #include <linux/libfdt_env.h>
Change-Id: I68fd5734d6460c169fa5ee2893c57cb5d73340b6
Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit b08c8c4870831c9315dcae237772238e80035bd5)
This converts the following to Kconfig:
CONFIG_APBH_DMA
CONFIG_APBH_DMA_BURST
CONFIG_APBH_DMA_BURST8
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
[trini: Add in MMC as well]
Change-Id: I45b919ab747aa414ba23f1e165c11dd8aff44c44
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 99bec1aead5927c54f4364bfe10823a86fe0dad2)
wait_for_bit callers use the 32 bit LE version
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Change-Id: I638846de7db29711fb7c778cc8304b507de057fe
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 48263504c8d501678acaa90c075f3f7cda17c316)
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
The sd card power is enabled when PWREN is set low by rockchip hardware design.
Change-Id: I4fb54235bd5235030146f77be1e07dc4e729ae06
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Add function get_cd to detect storage device directly instead of detect
it by mmc command.
Change-Id: I486dee836c62092baabe40fc6de995904849f91d
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
According to eMMC spec, the resp_type of MMC_CMD_WRITE_MULTIPLE_BLOCK
is MMC_RSP_R1 but not MMC_RSP_R1b.
If use MMC_RSP_R1b, this causes rpmb can not work with sdhci drive.
Change-Id: I02ab825a4a526646079be6a7ae27326d1a3b7acf
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Thomas reported U-Boot failed to build host tools if libfdt-devel
package is installed because tools include libfdt headers from
/usr/include/ instead of using internal ones.
This commit moves the header code:
include/libfdt.h -> include/linux/libfdt.h
include/libfdt_env.h -> include/linux/libfdt_env.h
and replaces include directives:
#include <libfdt.h> -> #include <linux/libfdt.h>
#include <libfdt_env.h> -> #include <linux/libfdt_env.h>
Change-Id: I6c0f7e50e8b571106627f25ddac008a62bd2994e
Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
In the eMMC spec, “Note that while the actual timing change is done,
the behavior of any command sent command sent (like CMD13) cannot be
guaranteed due to the asynchronous operation. Therefore it is not
recommended to use CMD13 to check the busy completion of the timing
change indication.” indicates that SEND_STATUS can not be send after
set-timing, so delete it.
Test eMMC model:
Manufacturer ID: 45
OEM: 100
Name: DG401
Rd Block Len: 512
MMC version 5.1
Capacity: 14.7 GiB
Change-Id: Idd47461b529f28af649f2275041f36ef998ee404
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
The cmd13 can't guarantee the switch command is success even it response
without any error bit assert. So we should wait busy signal to wait the
behaviour of the device is completed.
Change-Id: Ia7e9efc27b5e05a7bcb9b4c98eef1e134efc29e7
Fixes: 55e5defd20 ("mmc: rework mmc_switch for non-send_status scenario")
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
We set the fifo_depth to 0x100 word in Rockchip platform, and
fifo_depth/2 must be multiple of dma_multiple_transaction_size.
So we can set DWMCI_MSIZE to 6 according to max
dma_multiple_transaction_size being 128.
The DWMCI_MSIZE must be set as larger as possible. If not, dma fifo will
be full, and crc error occur when the clock stop during the data phase.
Change-Id: I013b6f9c272edbc723b2f627e88d30d653c42d1b
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
The valid window of mmc sample phase is 0-360. It is separated
to four options for tuning to improve tuning efficiency.
If init_retry counter exceeds four, set init_retry to zero.
If the default_phase is set, we use it. If fail, try strategy of
tuning above.
Change-Id: I4938717937d37ef156c278277d188f1b25d6ebbc
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Add the "mmc-hs200-1_8v & mmc-hs400-1_8v" to the dts
to support hs200&hs400
Change-Id: Ic141b75b328a56609853aae50c8a094c605931e1
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Add default sample clock phase and it can be used when
run mmc_send_tuning.
The function mmc_send_tuning will use default_phase directly
to set the sample clock phase, and this can improve tuning's
efficiency. If use default_phase to run mmc_send_tuning fail,
it will change to tune 0&45...&270 phase.
Change-Id: I747f7820a7d2a67ffb9152794acec31b15e97e2b
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
BUG: If erase is set as MMC_ERASE_ARG, the erase command
perform an erase on erase group(s). If so, when the start
address is close to the next partition address and the
blkcnt is less than erase group size, the mmc_berase()
will recalculate the end address and may exceed the next
partition start address. This will erase the other partition
useful data.
Solve: Set erase mode as trim, the erase command perform an
erase on the sector(s).
The erase command of SD card perform an erase on the sector(s).
We can just send the start and end address to erase SD card
and send CMD38 with argument MMC_ERASE_ARG.
Change-Id: Ic4251b77e9f9feb6a087324c0241625ff013a0a0
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Use debug instead of print for not always print the message, we can use
mmc info to know MMC mode.
Update the info by the way.
Change-Id: Iaf5762246b4dbbbb4baf92aca478304dc1f49746
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The emmc support several erase mode, we add mmc_can_trim
flag hear to support trim.
Change-Id: Iaee154eb0ef5edb95783aa3753421afd7c058263
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
If data error, we will reset the controller and wait when it is
ready. But the timeout data type is u32, it is never less than
zero. So change judgement data to one.
Change-Id: If049da06ecfe42fd31cca344bf87f69f7850dbe2
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
If emmc driver config MMC_TIMING_MMC_HS, need config
controller SDHCI_HOST_CONTROL2 register SDHCI_CTRL_UHS_SDR50.
It will affect emmc phy work mode.
Change-Id: Ib45f30eb6b70bde6f1beb4612ded17ee2b24b5fe
Signed-off-by: chenfen <chenfen@rock-chips.com>
Priority to use cru division is better timing than use controller
division.
Change-Id: I8b7b9a9c99f09407f209fda8df6460136a3105e9
Signed-off-by: chenfen <chenfen@rock-chips.com>
BUG: If not find ciu-sample, probe will fail. This make
mmc device unusable.
Change-Id: I86310cd2bc84cea5a81b72d103c8947ed4c1b07b
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
we can set mmc-hs200-1_8v to the node of emmc
in the dts to support hs200.
Change-Id: I5fa195505b877449864f294564cfc33bcd4202e5
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
1.judge the clk_get_by_name return value
2.rename the ciu_sample to ciu-sample according
to dts
Change-Id: I60c9f43f8cf0dd02815ee9078f5e957dc9c6d24d
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
This reverts commit 4a872f4aa8.
rk3229 evb and echo can not work with ddr52 enable.
Change-Id: Ia22b30ffe40de6f6e74e50ec5fd52e3715006de0
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
U-Boot widely uses error() as a bit noisier variant of printf().
This macro causes name conflict with the following line in
include/linux/compiler-gcc.h:
# define __compiletime_error(message) __attribute__((error(message)))
This prevents us from using __compiletime_error(), and makes it
difficult to fully sync BUILD_BUG macros with Linux. (Notice
Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().)
Let's convert error() into now treewide-available pr_err().
Done with the help of Coccinelle, excluing tools/ directory.
The semantic patch I used is as follows:
// <smpl>
@@@@
-error
+pr_err
(...)
// </smpl>
Change-Id: I921807c1770d36a91e692c48ab477558bb2ed0b8
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Re-run Coccinelle]
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 9b643e312d528f291966c1f30b0d90bf3b1d43dc)
Update the Rockchip SDHCI wrapper to support a live device tree.
Change-Id: I6b093c4dcb7f9286b156fe8d2cef54d030969840
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 327b2b35c527d2ec6c8de4fdebb71322c0f085fb)
Update the Rockchip-specific wrapper for the Designware driver to
support a live device tree.
Change-Id: I114c6c49907f0c40de0e3d4a6249684a2986329a
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit be5f04e850e89639ffe7ec4d2dccd327eb354cde)
Import include/linux/dma-direction.h from Linux 4.13-rc7 and delete
duplicated definitions of enum dma_data_direction.
Change-Id: I9c6569e4ab91ac82fb1c99a38003a1ac48061813
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit b27af39935855c88ef2203dcfc1ff54e013237c4)
increase the cpu frequence to 816M, and enable mmc ddr mode
for emmc.
Change-Id: I93d6b3c625c73d5e75accfb26559930dd299e0e9
Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
Add interface functions for external programs,
other functions can use it to read and write
rpmb partitions.
Change-Id: Ie94a6586077e1e9f4fc2924d283029f0a4a3e545
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
add support for uboot read Multi block data from
rpmb partition and write Multi block data to rpmb partition.
The previous patch can only read or write one block one time,
and it affect reading and writing efficiency.
Change-Id: I4b0b19a4a0d985e1d08930fdfbce13ffb847d2f8
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Flashing a 400Mb sparse system image takes ~10 minutes. The fastboot UDP
protocol expects a response within 1 minute, so during long flash
operations, the device must send fastboot "INFO" packets.
This patch does the following:
- Separate large writes into writes of size FASTBOOT_MAX_BLK_WRITE.
This parameter was tuned by hand to result in a ~10 second write.
- Keep a timer and send an INFO packet every 30 seconds.
- Adjust the sequence number in the header of the fastboot OKAY packet
to account for any INFO packets sent during flashing.
- Reduce busywaiting in the bcm2835 MMC driver. This change is based on
what the kernel does, and doesn't seem to corrupt the MMC. Without
this change, "flashall" takes 25 minutes.
Bug: 31887729
Test: "fastboot -s udp:$RPI_IP flashall" works, rpi3 boots
- Compute CRC checksum over every write to verify written data
was not corrupted.
Change-Id: Ib17ef6a85715705a8b5f722a8b7d3e5fd1a6625d
This patch enables support for the Rockchip RK3066 SD/MMC controller,
which is based on Designware IP. The device supports SD, SDIO, MMC and eMMC.
Change-Id: I3724634928c5e2a8c0b187f953081e8e0faa3ec0
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
dw_mmc supports two transfer modes in u-boot: idma and fifo.
This patch adds autodetection of transfer mode and eliminates setting this in host config struct
Change-Id: I0eafb78c3fd171827664e320b8959f3c5e27094a
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
We should increase the buffer address instead of fifo for
write case.
Change-Id: Ifab8ab0480c7b6f5cd0f89c8cd67ed7b7005acad
Fixes: bda599f7c7 ("mmc: dwmmc: Add stride PIO for better burst mode support")
Reported-and-tested-by: Frank Wang <wmc@rock-chips.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
This patch enables stride PIO for better burst mode
support on some rockchip platforms, for instance rk3128,
etc. It uses ldm and stm to make multiple accessing from
CPU under some ARM architecture.
Design Note:
1) Carefully test it beyond the armv7(m) core since I don't
test them! If you disassemble the code, dwmci_memcpy_fromio
may be changed to use ldmia.w and stmia.w, as well as some
other optimization for push/pop stack operation, but they
are all fine!
2) Do *NOT* remove noinline and __volatile attributes as
you could fall into trouble by the optimization of GCC.
And please invent new attributes if you use *OTHER* compilers
which have their own keywords claiming the function to be a
"plase don't inline the function and please don't reorder the
groups".
3) If you want to use this feature for other rockchip platforms,
you could append new config in rockchip_dw_mmc.c. But now we only
have CONFIG_ROCKCHIP_RK3128 which means we just enable it for
rk312x platforms.
4) Stride PIO is determined by both of host->stride_pio and
the data payload. The intention of it is to make the block
accessing faster. So now only enable it for who's data payload
is larger(or equal to)than 512 Bytes.
5) MAX_STRIDE means we support burst MAX_STRIDE * 4 Bytes per
stride. Of course you could change that, but please read the
comment before it in the code and do it carefully.
How to test?
1) Prepare a memory, for instance, 0x70000000 on RK3126c.
=> mw 0x70000000 0x55aa55aa 0x200
2) Check it to see if 0x70000000 ~ 0x700000200 are all 0x55aa55aa
=> md 0x70000000 0x200
70000000: 55aa55aa 55aa55aa 55aa55aa 55aa55aa .U.U.U.U.U.U.U.U
70000010: 55aa55aa 55aa55aa 55aa55aa 55aa55aa .U.U.U.U.U.U.U.U
70000020: 55aa55aa 55aa55aa 55aa55aa 55aa55aa .U.U.U.U.U.U.U.U
70000030: 55aa55aa 55aa55aa 55aa55aa 55aa55aa .U.U.U.U.U.U.U.U
....
3) Fetch data of 0x70000000 ~ 0x700000200 and wrrite them to eMMC,
for instance, LBA 0x10000, and blk count is 1 as one blk means 0x200
bytes.
=> mmc write 0x70000000 0x10000 1
MMC write: dev # 0, block # 65536, count 1 ... 1 blocks written: OK
4) Clean the merory buffer and double check it
=> mw 0x70000000 0x0 0x200
=> md 0x70000000 0x200
70000000: 00000000 00000000 00000000 00000000 ................
70000010: 00000000 00000000 00000000 00000000 ................
70000020: 00000000 00000000 00000000 00000000 ................
....
5) Well, now let's read back the data from eMMC from the LBA
we wrote before.
=> mmc read 0x70000000 0x10000 1
MMC read: dev # 0, block # 65536, count 1 ... 1 blocks read: OK
6) We expect the 0x70000000 ~ 0x700000200 should be 0x55aa55aa instead
of 0x0 which is cleared by step 4).
=> md 0x70000000 0x200
70000000: 55aa55aa 55aa55aa 55aa55aa 55aa55aa .U.U.U.U.U.U.U.U
70000010: 55aa55aa 55aa55aa 55aa55aa 55aa55aa .U.U.U.U.U.U.U.U
70000020: 55aa55aa 55aa55aa 55aa55aa 55aa55aa .U.U.U.U.U.U.U.U
70000030: 55aa55aa 55aa55aa 55aa55aa 55aa55aa .U.U.U.U.U.U.U.U
....
Great, we see that the write and read eMMC are finished well and
the data payload is correct as expected!
Change-Id: I9b68c335449550b95f1a8f5841d46821346e45af
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
After Simon's patch, the dtoc can work with 64bit address,
so we need to fix reg number for it.
Depend on Simon's patch set:
https://patchwork.ozlabs.org/cover/807266/
Change-Id: Ibd3cda6d5891b1faccb23da94cd4200cb12dd514
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Jason Zhu
Masahiro Yamada
Adam Ford
Jon Lin
Ziyuan Xu
Kever Yang
chenfen
Philipp Tomsich
Wenping Zhang
Hisping Lin
Jocelyn Bohr
Paweł Jarosz
Shawn Lin