dw_mmc supports two transfer modes in u-boot: idma and fifo.
This patch adds autodetection of transfer mode and eliminates setting this in host config struct
Change-Id: I0eafb78c3fd171827664e320b8959f3c5e27094a
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Use live tree functions to fill dwc2_plat_otg_data structure in board_usb_init.
Change-Id: Iea1055a77e7f42ec65627bc82ad5a7924910e9b0
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
mk808 is a tv stick with two usb ports, micro sd card slot, hdmi and
nand onboard.
Change-Id: I317c516f2023eec59c46195dd8280684137f977c
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
rk3xxx.dtsi is used by rk3188 and rk3066. rk3188 uses alocated data in spl but rk3066 needs it in tpl.
Change-Id: I6e3ca3d45a6764421e441eba24e68ad7b8bec745
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This patch allows building of nand_bbt, nand_ids, nand_util for nand drivers that need it.
Change-Id: I20beea9442a13bce926a5a2be24e3e2a69cf1b2d
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
In current state dfu depends on cmd/mtdparts.c which isn't build in SPL.
This patch resolves it by cutting out unwanted code in SPL build.
Change-Id: I7b25d3991d2b4e3a4c50b90fa6cac760472650b2
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The Rockchip boot ROM requires a particular file format for booting from NAND:
* It starts with 512-byte, rc4 encoded header and is aligned to nand page size
* Then first 2KB of first stage loader (tpl) aligned to nand page size
* n empty pages
* second 2KB of first stage loader (tpl) aligned to nand page size
* n empty pages
* ...
* first 2KB of second stage loader (spl) aligned to nand page size
* n empty pages
* second 2KB of first stage loader (spl) aligned to nand page size
* n empty pages
* ...
Size of spl and tpl must be aligned to 2KB.
example usage for nand with page size 16384 and one empty page in iteration:
# mkimage -n rk3066 -T rknand -d ./u-boot/tpl/u-boot-tpl.bin:./u-boot/spl/u-boot-spl.bin -X 16384,1 out
Change-Id: Ie4ecb50637449251956a868272ce51ef489c7a1e
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Add basic Rockchip nand driver.
Driver in current state has 16, 24, 40, 60 per 1024B BCH/ECC ability and 8 bit asynchronous flash interface support. Other features will come later.
Change-Id: I8e766afe7358a2357d75cfe094c4cd6fe92bd281
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Sandisk SDTNQGAMA is a 8GB size, 3.3V 8 bit chip with 16KB page size, 1KB write size and 40 bit ecc support
Change-Id: I7ff291de7406a6d43e99bc5fb8781a50abfd56ac
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This is more flexible for users to determine exit or not
Change-Id: Idcd9ad605b8615062fafae485cd2f297ed021fee
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Add core skeleton for rk3066
Change-Id: I9fac85baaf671ac598c1c759b0f387b83ba9c21c
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Add clock driver for rk3066 platform.
Change-Id: I15527fb77c3b9a46a25df2ff51f4a78cf3808ea0
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
grf is needed by various drivers for rk3066 soc.
Change-Id: Id605feb6491eab73c2db9a0acba6e096e519e4ba
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
We need to update gd in assamble code after relocate,
this is a fix to:
adc421e arm: move gd handling outside of C code
Change-Id: I2730d6e7a8f0ee2a2fb44d63dfc7991aaae733b7
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Enable TPL/SPL support and some related option in Kconfig.
Change-Id: Ifde2835d06cfd69933487a66ebce63956b12407e
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Enable driver options for TPL/SPL in evb-rk3328_defconfig.
Change-Id: I8f9e378b3d459d976e2522884b607b68b0fdf9fd
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Enable SPL_FRAMEWORK and TPL/SPL related base addr and size.
Change-Id: I59ee5675b66ec63c531931be7ba43606718c527f
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Enable the drivers need by TPL/SPL with 'u-boot,dm-pre-reloc'.
Change-Id: I7a3900379085e134631f390032fc974b25e46a08
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Add a script to generate binaries from bl31.elf, and generate
u-boot.its file for FIT image including u-boot, dtb and atf
binaries.
Change-Id: Ife016da5468b3c618c619354fb280b6951aed94b
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Rockchip TPL is not going to use both sram and dram, so
we will use a separate link file.
Change-Id: I336bdff8033ca2d49521a3639fbf182c293463b5
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
rk3328 spl is locate at dram, so do not have strict size limit,
suppose to enable storage media controller driver, load ATF and
U-Boot, then boot into ATF.
Change-Id: I60d0e2b278dc09b04bd098f682c06bd5fb6cecf7
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
rk3328 tpl suppose to init ddr sdram and then back to bootrom.
Change-Id: I05ec83e32650b5aca88940d725586ffabf28322e
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This driver supports ddr3/lpddr3/ddr4 sdram initialization.
Since we are going to merge the common part in dram driver for all
Rockchip SoCs, this patch become a RFC and can be used for people
who need it.
Change-Id: I255411e02089b461fdc384842e23ec2e092f87fb
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Use default value 0x4000 for SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR instead
of define a new one.
Change-Id: Icfaf22554f3dd3581b1ad92dc0529b9ff6c352d1
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Rockchip use a 'loader2' partition for U-Boot, so u-boot.bin or
u-boot.itb load by SPL need to locate at0x4000. Detail here:
http://opensource.rock-chips.com/wiki_Boot_option
Change-Id: I3375346d04538cef1ce797bd2da5480c9ed50674
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
User do not need to access the reserved part in system, remove them
from partition table.
Rename atf to trust as generic name for armv7 do not use ATF.
Change-Id: Iadf98fca8ec8887e4bca8f5feef9cf0071b1813f
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
We use the same default ENV setting in rockchip_common.h for all SoC.
Change-Id: Icd3e9a56c42254bc727cb683cb0736fe7c7997b0
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Rockchip ARM64 SOC will change cpu entry, only fst reset can reset it.
Change-Id: I9172dae79ced3128f6a11fb0f4029685c6662dfd
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Sysreset do not help much in TPL, let's disable it to save code
space.
Change-Id: I51714e00284315767d874ecb85e56cb2c5ee2fe8
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Use a common driver for all Rockchip SOC instead of one for each SoC.
Use driver_data for reg offset.
Change-Id: Ie4a246e53052db47aab9cb3b0105d44a484db484
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Paweł Jarosz
Joseph Chen
Kever Yang
Elaine Zhang