Commit Graph

838 Commits

Author SHA1 Message Date
Wyon Bi 350f6a1836 video/drm: rgb: support pinctrl state select
Change-Id: I7eb1204e24e17894d529fc582d3bd4a90a61327a
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-04-29 10:13:19 +08:00
Shixiang Zheng 7e72214d51 video/drm: logo: the negative height will cause vop register err
the bmp file has been processed when reserved equals BMP_PROCESSED_FLAG

Change-Id: I793582cdd4ee5ee2a774c7a0dee8d36c81ed4f4c
Signed-off-by: Shixiang Zheng <shixiang.zheng@rock-chips.com>
2019-04-09 14:44:20 +08:00
Wyon Bi 005d29a79d video/drm: rockchip_display: support get display mode from edid if client is not present
Change-Id: Ib8956972b7bbb6aaaac2e3c8a93e0d38d98abf6a
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-03-05 15:24:33 +08:00
Wyon Bi cf0aae6839 video/drm: rk618_lvds: Add support for MEDIA_BUS_FMT_RGB666_1X7X3_JEIDA bus format
Change-Id: I12480932e3f5fa6ea1dc4684be697989eff304fc
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-02-20 09:14:12 +08:00
Wyon Bi 9c5e1148ec video/drm: vop: Add support lvds bus format
Change-Id: I9674d3478d279f0e0fd47529f96d336c4027cd13
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-02-20 09:14:12 +08:00
Wyon Bi 4888f8a48a video/drm: lvds: Add support for MEDIA_BUS_FMT_RGB666_1X7X3_JEIDA bus format
Change-Id: Id8b17e482036ce7c8eb543a673eb1b745958c7c3
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-02-20 09:14:12 +08:00
Wyon Bi 31018a86a8 video/drm: lvds: Correct P2S_EN register field on px30
Change-Id: I464df20abe7a3fb1d1fb5f275a9c79a672008a96
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-02-20 09:14:12 +08:00
Wyon Bi db7863d082 video/drm: lvds: Remove unused file
Change-Id: If7398e132de477079a366e0b1df82b83856e9b05
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-02-19 12:48:55 +08:00
Wyon Bi 1953e61947 video/drm: Sync MIPI DSI Bus helper from Linux 4.9
This imports drivers/gpu/drm/drm_mipi_dsi.c from Linux kernel 4.9.
It can be very helpful when porting Linux mipi dsi driver to U-Boot.

DSI hosts expose operations which can be used by DSI peripheral drivers
to access associated devices.

Change-Id: Iccfa9d946f33458867f4d4db0ce04aeb1918e855
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-02-15 11:37:45 +08:00
Wyon Bi 85e15df95e video/drm: Rename rockchip-inno-mipi-dphy.c to inno_mipi_phy.c
Change-Id: I20b9c24fc7df3f4fb74eb8ce7b722b945ac7d245
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-02-15 11:35:33 +08:00
Wyon Bi dddde95be4 video/drm: analogix_dp: add edp reset control support
This patch adds eDP software reset operation to make sure
register access successfully on RK3288 and it fixes possible
register default value abnormal issue during boot up.

1) normal case:
Rockchip UBOOT DRM driver version: v1.0.1
0x120: 0x00000007
0x390: 0x00000003
Using display timing dts
Detailed mode clock 200000 kHz, flags[a]
H: 1536 1548 1564 1612
V: 2048 2056 2060 2068
bus_format: 100e
Link Training success!
final link rate = 0x06, lane count = 0x04

2) abnormal case:
Rockchip UBOOT DRM driver version: v1.0.1
0x120: 0x00000066
0x390: 0x00000202
Using display timing dts
Detailed mode clock 200000 kHz, flags[a]
H: 1536 1548 1564 1612
V: 2048 2056 2060 2068
bus_format: 100e
failed to get Rx Max Link Rate
failed to init training
unable to do link train

Change-Id: Idacbb0c72a40442da3a87e60bfe1d9965f3ca79c
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-31 16:44:29 +08:00
Wyon Bi 611de31725 video/drm: analogix_dp: Fix color depth configuration
Change-Id: Iea7fb59a2eb811d3db09cb6d0d8be03cd98a4645
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-30 18:41:25 +08:00
Wyon Bi 00cdbd6c88 video/drm: panel: Allow to configure bpc (bits per color) from DT
Change-Id: Iad86b7121e4cdfbd981daba6f860fd8b97bca52a
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-30 18:41:25 +08:00
Wyon Bi 74e3938979 video/drm: Rename rockchip-dw-mipi-dsi.c to dw_mipi_dsi.c
Change-Id: I409b32e945a2182e2948255b02644a98d16fcc21
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-30 18:41:24 +08:00
Wyon Bi 8b8b9c4b96 video/drm: dsi: fix pll clock setting for synopsys phy
Fixes: 1c3c799444 ("video/drm: dsi: fix pll clock setting for synopsys phy")
Change-Id: I1b5ef22c6c63a99dd3f10ea03f31d50d3bfeea06
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-30 17:11:20 +08:00
Wyon Bi 49ae8667cc video/drm: display: atomic display enable handling
Change-Id: If71e8590fb4e1b1e743d4b085e42b7530f518084
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-30 11:40:17 +08:00
Wyon Bi 9f1d10d309 video/drm: dsi: rework dual channel mode
Change-Id: If119532a057d731f523a7ec8b035e9addc76d1e1
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-25 14:57:29 +08:00
Wyon Bi 1c3c799444 video/drm: dsi: fix pll clock setting for synopsys phy
Change-Id: Ib2cfdf413e3c4da039a16971fcc00baaab3b101c
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
(sync from rk/kernel:develop-4.4:331690a183f536fe8a791ceed4231f7e484f8fb7)
2019-01-25 14:57:29 +08:00
Wyon Bi cef5be6b54 video/drm: dsi: Bypass TLP clock lane and data lanes counter threshold
Change-Id: I2b750800859626f3d95ebe6b1b8a3d86aefc07d1
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
(sync from rk/kernel:develop-4.4:3ef4c2204f9be3f0877333b5d35ab11e322ed90d)
2019-01-25 14:57:29 +08:00
Wyon Bi 2612c8202d video/drm: dsi: Don't hardcode/bypass phy default parameters
Change-Id: If8670bee99c1397647323b34acd3e3da028549c3
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
(sync from rk/kernel:develop-4.4:bd920c36fc56d00a24d3688510c84c62d7921c6a)
2019-01-25 14:57:29 +08:00
Wyon Bi 374e75505b video/drm: dsi: fix phy power-on sequence
Change-Id: I1f48f5d13d772ee8c3c71ee40f122811d687bcc6
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
(sync from rk/kernel:develop-4.4:1df398e95a19c472ac847ced671175f147a043ad)
2019-01-25 14:57:29 +08:00
Wyon Bi e6cbaa2472 video/drm: dsi: rework test interface
Change-Id: I8521fa8aa8b1ba11888dd506f238e6e6c2d7ad39
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
(sync from rk/kernel:develop-4.4:2c659c75a6fb5fc99279a8d4e64b222d0158e77b)
2019-01-25 14:57:29 +08:00
Wyon Bi 2400e5a499 video/drm: Kconfig: select generic phy by default
Change-Id: I07fa63bfc1e03ed87c78555cb96d106c603d083a
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-22 17:05:23 +08:00
Sandy Huang 513e5cb687 drm/rockchip: vop: add hdmi pol config for px3se
if miss this commit will appear hdmi display abnormal at
some TV.

Change-Id: I86f1425135ccf5fb53c0373ad6d070e1f6efe66d
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2019-01-10 14:39:47 +08:00
Wyon Bi b69d3ed41b video/drm: lvds: Clean up phy code
The video phy of px30/rk3128/rk3288/rk3368 is now supported by
inno_video_combo_phy.c/inno_video_phy.c in directory drviers/video/drm.

Change-Id: I5471de3aa7c43fbf379b4313f158038145ab36c1
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-10 09:50:27 +08:00
Wyon Bi 496271300b video/drm: rgb: Add support for rk3128/rk3288/rk3368
Change-Id: I248a2966514f4417d88c070dcb4e87e682f04df5
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-10 09:50:27 +08:00
Wyon Bi 9fb0493f61 phy/rockchip: Add support for INNOSILICON LVDS/TTL PHY
Innosilicon LVDS/TTL PHY implements LVDS TIA/EIA protocol.
Normally, Innosilicon LVDS/TTL PHY contains four 7-bit
parallel-load serial-out shift registers, a 7X clock PLL,
and five Low-Voltage Differential Signaling (LVDS) line drivers
in a single integrated circuit. These functions allow 28 bits
of single-ended LVTTL data to be synchronously transmitted over
five balanced-pair conductors for receipt by a compatible receiver.

In addition, Innosilicon LVDS/TTL PHY could extend from 4 lanes
to N lanes (N is required by the customer). Therefore, the TTL
lines extend respectively.

Change-Id: I2b6b9cccd88c8ca89ef5f45e964e9eb936777ffc
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-10 09:50:27 +08:00
Wyon Bi 1e992932a7 video/drm: mipi_dphy: Remove support for px30/rk3128/rk3366/rk3368
The mipi dphy driver of px30/rk3128/rk3368 is now supported
by inno_video_combo_phy.c.

Change-Id: I1194fa3093cb2bac1cb75ccf1266c7bd4dd68867
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-10 09:50:27 +08:00
Wyon Bi c916e93361 video/drm: dsi: set phy mode before enable phy
Change-Id: Ida5fa789aa634a44102cdb72599716fdda8ea1fd
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-10 09:50:27 +08:00
Wyon Bi caad302d1f video/drm: Add support for INNOSILICON MIPI/LVDS/TTL Video Combo PHY
The Innosilicon Video Combo PHY not only supports MIPI DSI,
but also LVDS and TTL functions with small die size and low
pin count. Customers can choose according to their own applications.

Change-Id: I45bfb63014ddc1df0931ae573894e14aec8dc461
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-10 09:50:27 +08:00
Wyon Bi 396701fd2f video/drm: rockchip_phy: support set_mode callback
This patch adds generic PHY modes to the phy_mode enum, to
allow configuring generic PHYs to the MIPI/LVDS/TTL mode by
using the set_mode callback.

Change-Id: I28c5cdf905026b246f928eb8f75a212408df281b
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-10 09:50:27 +08:00
Nickey Yang 25b06c45e8 drm/rockchip: vop: use win1 for ui instead of win0 in px30 vopb.
PX30 vopb have win0, win1 and win2 layers.the formats they support below:
Win0:   XR24 AR24 XB24 AB24 RG24 BG24 RG16 BG16 NV12 NV16 NV24 NA12 NA16 NA24
Win1/2: XR24 AR24 XB24 AB24 RG24 BG24 RG16 BG16

Only the win0 layer support NV12 format(video decode format).
So change to use win0 for video overlay layer and win1 for ui layer.

Change-Id: I4cb0b6e46a8f9d34231b776d795e415a7fe7fe6a
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
2019-01-03 11:40:06 +08:00
Wyon Bi 7cacd0a851 video/drm: panel/phy code style clean up and fixes
Silence debug messages if the panel/phy does not exist.

Change-Id: Ifa027017e9aa9af54992e26f2bbde7048b22bb04
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-12-26 18:45:39 +08:00
Wyon Bi c52351ffbe video/bridge: anx6345: Convert to rockchip_bridge
Use the rockchip_bridge_funcs instead of the video_bridge_ops so that
anx6345 device can work on the rockchip platform.

Change-Id: I3ded401816ba8347bddfedcae8aacab4667df2af
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-12-26 18:45:38 +08:00
Wyon Bi a4878dda5e video/drm: rgb: Allow to configure data sync from DT
Change-Id: I2e83a7ed7e2d74a23b74301c57899a9e763ca1bf
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-12-26 18:45:38 +08:00
Wyon Bi 117fdc8998 video/drm: Add support for rk618
RK618 is a partner chip for Rockchip mobile application processor.

RK618 includes two RGB display input interface with double data rate.
With the internal MUX function, it can output 1080P HDMI signal to
TV and output RGB/LVDS/MIPI signal to TFT panel. In this case, RK618
can support dual panel (TV and TFT) display.

Change-Id: I566b161211e6662f73e5de2b14fb20b33e8e57ef
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-12-26 18:45:37 +08:00
Wyon Bi 1a8d717c29 video/drm: Add rockchip bridge framework
The current implementation assumes that the only possible peripheral
device is a panel. Using an output bridge device should also be possible.

Such sequence is required by Rockchip RK618 bridge, which is a RGB
peripheral bridge device.

Change-Id: I3e4e5e9e23c8ed7c74ed1276946b7b54f4cd5ee8
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-12-26 18:45:37 +08:00
Wyon Bi 74ea6d2f10 video/drm: dsi: scan sub-nodes of the dsi node
This allows the panel on child nodes of the dsi node can be binded.

Change-Id: I6d5ae71cd10afa2bc100955847b301f0279a0ee2
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-12-26 18:45:36 +08:00
Vasily Khoruzhick 96b9f0a76a UPSTREAM: video: add anx6345 DM driver
This is a eDP bridge similar to ANX9804, it allows to connect eDP panels
to the chips that can output only parallel signal

Change-Id: I35dbe3ea1c8868420fce58279e877a0641903b94
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
[agust: fixed most checkpatch errors/warnings]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
(cherry-picked from 491041c74965275defd2749db0e2248b2a7e317a)
2018-12-26 18:45:36 +08:00
Fabio Estevam caedb0c4c8 UPSTREAM: treewide: fix up files incorrectly marked executable
Inspired by the following kernel commit:

"commit 90fda63fa1156ec1bcfd7f9ca384cec221f70a21
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date:   Sat Apr 7 13:31:23 2018 -0700

treewide: fix up files incorrectly marked executable

Joe Perches noted that we have a few source files that for some
inexplicable reason (read: I'm too lazy to even go look at the history)
are marked executable:

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
drivers/net/ethernet/cadence/macb_ptp.c

A simple git command line to show executable C/asm/header files is this:

   git ls-files -s '*.[chsS]' | grep '^100755'

and then you can fix them up with scripting by just feeding that output
into:

  | cut -f2 | xargs chmod -x

and commit it.

Which is exactly what this commit does.

Reported-by: Joe Perches <joe@perches.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>"

Do the same in the U-Boot source tree.

Change-Id: Ie086d3ab3b393097a9dd6c041546296a16eee2dc
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
(cherry-picked from 02325c7bfd7ccafae600774273f1b8ac11e90c08)
2018-12-26 18:45:35 +08:00
Vasily Khoruzhick 791f74cf96 UPSTREAM: video: anx9804: split out registers definitions into a separate header
This header will be used in anx6345 driver

Change-Id: Ib6beea5f2d063d7bfb5054f24d5098ee7e0a42ca
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
[agust: moved header to drivers/video]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
(cherry-picked from 24bf59d0243f0ee496b20aee985968729b8d0386)
2018-12-26 18:45:35 +08:00
Vasily Khoruzhick 7587ed8968 UPSTREAM: dm: video: bridge: don't fail to activate bridge if reset or sleep GPIO is missing
Both GPIOs are optional, so we shouldn't fail if any is missing.
Without this fix reset is not deasserted if sleep GPIO is missing.

Change-Id: I25f2d11d7df96a4a93fcd844bcf34c3fb5109336
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Tested-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Cc: Vagrant Cascadian <vagrant@debian.org>
(cherry-picked from 8336a43792a103c13d939b3925cb75322911f7fb)
2018-12-26 18:45:34 +08:00
Vasily Khoruzhick d2bb07b716 UPSTREAM: dm: video: bridge: add operation to read EDID
Add an operation to read EDID, since bridge may have ability to read
EDID from the panel that is connected to it, for example LCD<->eDP bridge.

Change-Id: I03b711cd3a138f83c896ef656ffc5171b30eee40
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
(cherry-picked from fdb5525572ec7dc240ccc960888ae969253fede4)
2018-12-26 18:45:34 +08:00
Masahiro Yamada 0e00a84cde UPSTREAM: libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h>
Thomas reported U-Boot failed to build host tools if libfdt-devel
package is installed because tools include libfdt headers from
/usr/include/ instead of using internal ones.

This commit moves the header code:
  include/libfdt.h         -> include/linux/libfdt.h
  include/libfdt_env.h     -> include/linux/libfdt_env.h

and replaces include directives:
  #include <libfdt.h>      -> #include <linux/libfdt.h>
  #include <libfdt_env.h>  -> #include <linux/libfdt_env.h>

Change-Id: I6c0f7e50e8b571106627f25ddac008a62bd2994e
Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2018-12-24 17:20:37 +08:00
Kever Yang 260eab1873 rockchip: video: use common API instead of private
We can use fdtdec_get_is_enabled() instead of fdt_device_is_available().

Change-Id: I7aa03ed82f83fc72206659889a4f7f095dc66b36
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2018-12-24 17:20:37 +08:00
Wyon Bi 6f920c07e0 video/drm: Rename rockchip_analogix_dp to analogix_dp
Change-Id: I5603a709abde6a852fcca0b3a5b833727d5f3cad
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-12-18 16:34:46 +08:00
Wyon Bi 9c3b19b6a2 video/drm: edp: code style cleanup and fixes
Change-Id: I7ae761ca7a493e72fc4b4ed55f6cb2aa40a7cbfa
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-12-18 16:34:46 +08:00
Wyon Bi a65ff5dd0e video/drm: dsi: Add support for adapted command mode (Auto mode)
Change-Id: I301bb5d9b40ebccdb1d2395e14a2d4cab5ea2325
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-12-10 09:43:04 +08:00
Wyon Bi 0163ec8206 video/drm: lvds: add bandgap handling
Fixes: 3c5714f034 ("video/drm: lvds: add bandgap handling")
Change-Id: Ieb88e8cae77bf8c2f8c874ed39c1e9d76b832716
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-12-06 11:39:41 +08:00
Sandy Huang 861ce1a007 Revert "Add: Allow logo in 16bit or 32bit color BMP"
This reverts commit 39965620e8.

Change-Id: Ic2996614b9cddc1835b079c2e7ac784daa99ad3f
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-11-30 11:27:06 +08:00