error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
Change-Id: Iadcf7065f02ee779d3eeee1cb70fd3e9905e1b3f
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
use rockchip_setup_ddr_param to setup ddr parameter.
The dram_init() and dram_init_banksize() make use of
sdram common code.
Change-Id: Icfc6cbef9fcc128e3a835184b46b89b9b22aab16
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Clears the corresponding interrupt bit of the PI_INT_STATUS
parameter before trigger data training.
Change-Id: Ic25c952a19913cb4332b6cd3405f41474585bfb1
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Select rk3399-sdram-lpddr4-100.dtsi to initialize LPDDR4
at 50MHz, it will change clock frequency to 800MHz
after initialization is complete.
Change-Id: I803ed2c809f17bbea40f379194bce548adc338ea
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Add support dram capacity detect.
Select dram timing file base on dram type and clock frequency,
don't need care dram capacity.Dram capacity will auto detect.
Change-Id: I0554a0ec0c753a159406330aa0baa2daafe7ab93
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Add commond code about rockchip dram init,include print dram info,
capacity detect,config msch timing,config os_regs and so on.
Change-Id: Ie4223dac31bde290d19627c96088542fcdd5521d
Signed-off-by: YouMin Chen <cym@rock-chips.com>
This dmc code is prepare for ddr test tool to scanning ddr freq,
normal firmware no need to enable it.
Current version only support PX30/RK3326 and RK3328/RK3228H,
CONFIG_ROCKCHIP_DMC=y to enable it
Change-Id: I25360846bb5af74eb82bdc6e64bdaa2d55ab0f64
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Init the ddr sdram in TPL instead of SPL, update the code.
Change-Id: I29ab54a2fe9aacc839826fc40ef263a10ef7033c
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
rockchip_setup_ddr_param use to write ddr param to
a known place for trustos.
Change-Id: Ied4636d5e709ed036a45434202d99e916a5f1dcb
Signed-off-by: YouMin Chen <cym@rock-chips.com>
set lpddr2 detect max row = 15 to match lpddr2 inc file
Change-Id: I8fd57984331d35bafaf263829760204c582d120d
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Include rk1808, rk3036, rk3308 and rk3326/px30 use this common
rockchip_sdram.c
Change-Id: Iee3e100992b07027c05f132fa536504ecc02f11f
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
- Use ram as a disk which appears as block devices.
- Provide a read only ramdisk driver.
Change-Id: Ie6dc1a036c8a2841cacd0d467599c11b74b4ad77
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
The programming mode of PCTL.MSTR is static,and only Can be written
when the controller is in reset.
Change-Id: If812a2bcec9f4f907b2539a3418b1526e1a6e1d2
Signed-off-by: YouMin Chen <cym@rock-chips.com>
1.The recommends value of dfi_tlp_resp is 7.
2.Set PHY_REG07[7] to 1 for off digit module clock when enter power down.
3.Force set DDR3 or DDR4 active_ranks to 3 to workaround the issue of
gate memory clock when enter power down.
Change-Id: Iea4dd5554a7c527053c91ab7bd0a9db8c8223b59
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Some platform with sram size small, not use TPL_DM framework for TPL,
so never need ram-uclass.
This can remove _u_boot_list_2_uclass_2_ram from tpl bin.
Change-Id: I93a6cfcc164f193d12f763d41ce68b5b20233541
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Some platform has a very limited SRAM space to run the TPL with
TPL_DM framework, so it's better to remove the dependency of
TPL_DM here.
Change-Id: Ia8bb6351e21f6590f68efe3663a60ca3653ba78d
Signed-off-by: YouMin Chen <cym@rock-chips.com>
This patch is for the implement of common interface, which get the
sdram info for rk3036, just need to get the sdram info from OS_REG
that has been written already.
Change-Id: I56fdebead092bf3bb649809203d076d11a9ff890
Signed-off-by: David Wu <david.wu@rock-chips.com>
add rv1108 sdram driver so we can set up sdram in SPL
Change-Id: Iecc6e896921b68ec97bf7d890a61a4ff75d6876b
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
This driver only add support to ram frame work, do not have really
dram init driver.
Change-Id: I4c079bcbfea1fc1079df536cf505b8ca87848f44
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Do not need to use rockchip_udelay after we can use systimer.
Change-Id: Ibcd722a71ca383c057128d9706c6679b49c17a3d
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
U-Boot widely uses error() as a bit noisier variant of printf().
This macro causes name conflict with the following line in
include/linux/compiler-gcc.h:
# define __compiletime_error(message) __attribute__((error(message)))
This prevents us from using __compiletime_error(), and makes it
difficult to fully sync BUILD_BUG macros with Linux. (Notice
Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().)
Let's convert error() into now treewide-available pr_err().
Done with the help of Coccinelle, excluing tools/ directory.
The semantic patch I used is as follows:
// <smpl>
@@@@
-error
+pr_err
(...)
// </smpl>
Change-Id: I921807c1770d36a91e692c48ab477558bb2ed0b8
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Re-run Coccinelle]
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 9b643e312d528f291966c1f30b0d90bf3b1d43dc)
With the new 32/64bit-aware dtoc, the type of reg is fdt64_t and the
OF_PLATDATA structure layout changes. This adjusts the DMC driver for
the RK3368 to track these changes.
For the time being (i.e. until regmap_init_mem_platdata works for the
64bit case), we won't use regmap_init_mem_platdata here and simply
access of_plat.reg[] directly.
Change-Id: I9e4e5b7cb650220902914f6ad724a8a312be93ba
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 1d70f0ac88dcd0ed9c17ec4c5e97db69de961319)
0x2000000 is a fixed address for share the ddr info.
Change-Id: I37e77f73028b0504776ea662ec7b308ab7d21204
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This driver supports ddr3/lpddr3/ddr4 sdram initialization.
Since we are going to merge the common part in dram driver for all
Rockchip SoCs, this patch become a RFC and can be used for people
who need it.
Change-Id: I255411e02089b461fdc384842e23ec2e092f87fb
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
RK3128 support up to 2GB DDR3 sdram, one channel, 32bit data width.
This patch is only used for U-Boot, but not for SPL which will
comes later, maybe after we merge all the common code into a common
file.
Cover-letter:
rockchip: add new SoC support for RK3128
RK3128 is a quad-core ARM Cortex-A7 SoC, this patch set add basic
support for it, it does not support SPL/TPL now, and the sdram driver
only support get dram size from sysreg in U-Boot stage. Most of basic
driver like clock, pinctrl, sysreset have been implement, and more
drivers like mac and display will be later.
END
Change-Id: I8756d6acf7b085e25edb8c6f3e56b7bc8a33353c
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
RK3188 using the same ddr_conf for both 15 bit and 16 bit row address.
Change-Id: If78e4922d85250f6962dcb17e17cd3ac5e480673
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
After Simon's patch, the dtoc can work with 64bit address,
so we need to fix reg number for it.
Depend on Simon's patch set:
https://patchwork.ozlabs.org/cover/807266/
Change-Id: Ifc715eeea82e412d2236f22a4d8885efc02aec40
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Since we have CONFIG_RAM framwork and its driver folder, move the driver
into it.
Cover-letter:
move rockchip sdram driver to driver/ram
move all the Rockchip sdram driver which support CONFIG_RAM into
driver/ram folder
END
Change-Id: I21aafa8c85ff65e3cb3f318cfeaefed059424c56
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Since we have CONFIG_RAM framwork and its driver folder, move the driver
into it.
Change-Id: I8196b81c7a05d2c041e7d1c7cdd38321b0dc38b8
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Since we have CONFIG_RAM framwork and its driver folder, move the driver
into it.
Change-Id: Icd3308c253646171d29a1a2295f528f95c623202
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Since we have CONFIG_RAM framwork and its driver folder, move the driver
into it.
Change-Id: I53f9de99b2b1180b74cca948847105be66d540f2
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Add driver for rk322x to support sdram initialize in SPL.
Series-version: 3
Series-changes: 3
- move rk332x sdram driver to driver/ram
- do the ram init in TPL instad of SPL
Change-Id: I44f5fed275d65e7758efd38f1a5124a8d9698a7d
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This adds a DRAM controller driver for the RK3368 and places it in
drivers/ram/rockchip (where the other DM-enabled DRAM controller
drivers for rockchip devices should also be moved eventually).
At this stage, only the following feature-set is supported:
- DDR3
- 32-bit configuration (i.e. fully populated)
- dual-rank (i.e. no auto-detection of ranks)
- DDR3-1600K speed-bin
This driver expects to run from a TPL stage that will later return to
the RK3368 BROM. It communicates with later stages through the
os_reg2 in the pmugrf (i.e. using the same mechanism as Rockchip's DDR
init code).
Unlike other DMC drivers for RK32xx and RK33xx parts, the required
timings are calculated within the driver based on a target frequency
and a DDR3 speed-bin (only the DDR3-1600K speed-bin is support at this
time).
The RK3368 also has the DDRC0_CON0 (DDR ch. 0, control-register 0)
register for controlling the operation of its (single-channel) DRAM
controller in the GRF block. This provides for selecting DDR3, mobile
DDR modes, and control low-power operation.
As part of this change, DDRC0_CON0 is also added to the GRF structure
definition (at offset 0x600).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To allow finer grained selection of features for TPL, we introduce
TPL_RAM (in analogy to SPL_RAM).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This commit models the dependency from SPL_RAM to SPL_DM in Kconfig.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Joseph Chen
Zhihuan He
YouMin Chen
Tang Yun ping
Kever Yang
David Wu
Andy Yan
Masahiro Yamada
Philipp Tomsich
Jagan Teki