Use CONFIG_SPL_KERNEL_BOOT for thunder boot to stay the same with SPL.
Change-Id: I0d2f0a91a5f628233de1cb848519fd76b692a2af
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
GPIO0_D6 pull down in default, but it's needed for SPI Flash with
WP# pin pull up.
Change-Id: I80a79e0072f1fff49673bbe834f51603e10283dc
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Moving current configurations into SPL boot stage except
something belongs to USBPLUG.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I64ec47f7c0c3cef57854a72af86e9ef1bebbcaed
1.It's good for Nand devices P/E align
2.But actually 0x200 sector(USB limit) is aligned with Nand flash block size
Change-Id: I69510161c32e15ee739c99d36f0294d59df554dd
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
add some special pll configs for better clock jitter.
Change-Id: I3484d36feb9f4b99a42a2ba532ae2015968d83ff
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Return partition name without any slot suffix in this case.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: If0692e3e2845f152802632994f5da5a9d3fb1731
flush_dcache_all() operating on set/way is faster than
flush_cache() and invalidate_dcache_range() operating
on virtual address.
Tested: it saves about 12.5ms in rv1126 thunder-boot.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ie8ba42f56e72d0d554dca3949573196ef2165bd7
We made a deal: Not allow U-Boot to bring up thunder-boot kernel.
Because the thunder-boot feature may require special memory layout
or other appointments, U-Boot can't handle all that. Let's go back
to SPL to bring up kernel.
Note: bootcmd is only called in normal boot sequence, that means
we allow user to boot what they want in U-Boot shell mode.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I8a68af3fbd441ab7e30ad310640eaf3ee5f24525
Keep rv1126 support in pinctrl-rockchip.c with legency
Change-Id: I50791c3c30e6efa58d324eaef7bfc4d4aa9e440c
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Put the nr_pins information to pinctrl info structure, instead of
calculating in probe.
Change-Id: I3af11d99ef4b0e30c306ebd99a2233cd0c6b97b5
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Only some Soc need Schmitter feature, so move the
implementation into their own files.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 79d16e45409f928c952b6935d695cd08f9db76b3)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I41ede5737258292e27492e391cf9a981210e4a71
As the mux/pull/drive feature implement at own file,
the type and label are not necessary.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 623aca88308b4f917f0465cd5dd1514ee781bee8)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: Idcbb3fdf4311567c599686d52926a057d1101b6b
RK3288 pmu_gpio0 pull setting have no higher 16 writing corresponding
bits, need to read before write the register.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 69a38f81bb55893a8555c899319305c539226a0a)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: Ie8f94cf1a0b33a24bb32d3de8231b7f2db51ddff
As the common set_mux func(), implement the feature at the own file
for each Soc.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 743a77373bfa22ca099b30d4ac88d95a2f98d1b6)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: Ib0de627d3aee1759965d64852bcd287785538dc0
RK3288 pmu_gpio0 drive strength setting have no higher 16 writing
corresponding bits, need to read before write the register.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 956362c84b0422ea99da947feca2878193c26ade)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I409107119d557b953c904b53e657685907879a3a
As the common set_mux func(), implement the feature at the own file
for each Soc.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 625ab11fdae3daf346647aaba59abee804e34589)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I07caae48cd4699aa7bbddf2edf7de6863c0a58c2
RK3288 pmu_gpio0 iomux setting have no higher 16 writing corresponding
bits, need to read before write the register.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit cd8f00ce08102d2dbb350c76bbb53f7b0f804b7d)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I7aaaf9642ee7bed6a2e9f6538a053bd6e1810dd7
Such as rk3288's pins of pmu_gpio0 are a special feature, which have no
higher 16 writing corresponding bits, use common set_mux() func would
introduce more code, so implement their set_mux() in each Soc's own
file to reduce the size of code.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 54e75702c48a9757e82cbe71176c0b5ddcf6a092)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: Ifdfce706e9b1cbe94300d2bed91182033f23f301
Some files have the redundant spaces, remove them.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 8541beb86daf3ce7e4be9ca67859aab3dd0daefb)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I9f621c3714260165bab0111e486a1d60ecf33c11
Some Socs use the pull-pin-default config param, need to add it.
And input-enable/disable config params are not necessary, remove it.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 0a5cc3cac96dcbb1f31c9c2a3954dad702a543c1)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: Id7522a4fdd21d42d46c42e6f66b93985064fd9ab
There are no higher 16 writing corresponding bits for pmu_gpio0's
iomux/drive/pull at rk3288, need to read the value from register
firstly. Add the flag to distinguish it from normal registers.
Signed-off-by: David Wu <david.wu@rock-chips.com>
(cherry picked from commit 502980914b2d6f9ee85a823aa3ef9ead76c0b7f2)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: Ibf0ba2d879904a06a2fb6722f5886a39c010a7f7
Use this driver to fit all Rockchip SOCs and to support
the desired pinctrl configuration via DTS.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
(cherry picked from commit e7ae4cf27a6d5837cb5e868712cdaa61d3ceb5e0)
1. fix with error handle with pin with IOMUX_UNROUTED.
2. add get pin count operation
3. modify drivers/pinctrl/rockchip/Makefile
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I1a398c865eb9e9afc38c6aca5431b6546e7260a6
1. set the noc ddrtimingc0.b.wrtomwr for LPDDR4
2. set the noc ddrmode.b.mwrsize for LPDDR4
3. update the noc ddrmode.b.burstsize
4. update the controller timing for 328MHz
5. set ddr4timing to 0 except LPDDR4
6. calculate ddr4timing using *_L timing for DDR4
Change-Id: I9f8fae51a05f8547d64da262d4c69fd4edec79fb
Signed-off-by: YouMin Chen <cym@rock-chips.com>
lpddr4 reg0x107/108 is for clk driver strength.
for other type of dram this register is for A6/A8 driver strength.
Change-Id: Ia0acbe03574ad5a1a4ecdaa2c0f53cb9a45c034b
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
The SPL without thunder-boot or U-Boot needs it.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ie2d8b59e35fbc2056cfbc910dae94419afcbfc09
Tang Yun ping
Weiwen Chen
Joseph Chen
Jon Lin
Elaine Zhang
Ziyuan Xu
Jason Zhu
Jianqun Xu
David Wu
YouMin Chen
Finley Xiao