Find the uboot by CONFIG_MTD_BLK_U_BOOT_OFFS address from nand,
spi nand, nor flash with mtd block interface.
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I6032570406a8eda2609ad877785e71c6c8b5df0c
We don't clearly know why there is odd address, maybe the
compression itself does.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Iabf2c09839485a0b12301ea003f945e1de414d83
Implement board_fit_image_post_process() to handle it.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Idc89d88894e115d0b627c411248434848714b53d
Get boot or recovery partition according to boot mode.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I5b5806985f166cd37382b1d4df32c9eaf7508c7a
Address definition:
comp = <0x...>: compress image address;
load = <0x...>: decompress image address;
We default reserve 1MB size for decompress if there is
no "comp = <0x...>", assuming it's enough for U-Boot,
tee and atf, etc.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ic82f69551301121f08fba88ff433ad5789859b70
Support load kernel fit image from boot/recovery partition
and ignore U-Boot proper if we expect to boot kernel in SPL.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I220c70c784e2327feea591756cbbde97ada8335f
Move code to a function in order to be shared with other code.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I0d54ea7bb28a54a54eb313cda11c33f4d4564a84
On the view of spl_xxx.c, it only cares about loading
U-Boot by spl_load_simple_fit().
Other partitions is better to be loaded in the
spl_load_simple_fit().
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I15625f7ebdb3aaee5491fddabf544951723b00a9
RV1126 decompress module access data without dcache.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Iee3eb077912e1222fcceab4615f872706cd3d43f
If the decompress module doesn't access the data through dcache,
it should add flush behavior to promise getting the real data
from dram. Otherwise it may decompress the wrong data but not
report any failure.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I6570ca7dc3a60c4b5bb9fcf3ae9f1025e2c658ea
SPL don't support IRQ and U-Boot proper is not deeply care
about boot time. There is not a mechanism to support IRQ
mode now.
In addition, the decompress irq is design to catch the exceptions
but not to decompress images continuously.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I842bce530aa180d5b0a30c1d2038575e464241b8
- Support get gunzip data size from src data;
- Support sync decompress for this round;
- Support return the gunzip data size of compressed image.
- Add misc_decompress_cleanup() for waiting last decompress done.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ie84b2a6174d04592110333d66667da66f98f07f6
Add more args for the function to parse more fit information.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I9be6607e5f7eb9b9912eb570f765dc6f634f956e
We use it to exit charge animation while system is in runtime.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ia6bc3f7a20310f73e060418f0a0ab01ef8745b11
use ROCKCHIP_RSA to enable RSA in uboot.
use SPL_ROCKCHIP_RSA to enable RSA in spl.
Change-Id: I1c3ae3754e9dbdfe39c81b554387fe78451a9fa2
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
The default ubi part info must be corrected while the part info will
be changed when enable a/b.
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I84db2e284f732f62014d3d14d99217fb707b85c0
Modify ddr support frequency to match PLL setting.
Change-Id: I1d93b2178933ada04e178bd068a8fec4ef43a4de
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Fixes: b9e63a962a ("edid: support decode edid to drm modes")
Change-Id: I97cece70ff053bedd78b9af29be64c3d3d7679eb
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
We add the support of the padding pss for rsa signature.
This new padding is often recommended instead of pkcs-1.5.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
(cherry picked from commit 061daa0b61f0fbeb214c566f3adb23da05545320)
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I28e5722504bfd0428cd119b2aaae60682a720648
The rsa signature use a padding algorithm. By default, we use the
padding pkcs-1.5. In order to add some new padding algorithm, we
add a padding framework to manage several padding algorithm.
The choice of the padding is done in the file .its.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
(cherry picked from commit 20031567e12bb312bff95b70767f6275e20f0346)
Conflicts:
common/image-fit.c
lib/rsa/rsa-sign.c
lib/rsa/rsa-verify.c
Change-Id: Ie522fec1ea69e6b86ebde0f7dad91a45670da66b
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Previous implementation of the rsa signature was using
the openssl API EVP_Sign*, but the new openssl API
EVP_DigestSign* is more flexible. So we move to this
new API.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
(cherry picked from commit 3b5d6979fcb80ffae3b140be6edc04cbde1a0b72)
Conflicts:
lib/rsa/rsa-sign.c
Change-Id: I6016a13904024a63d6fb8110cef37e57a164eed9
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Support XT26G01A, XT26G02A, XT26G04A, XT26G01B, XT26G02B
Change-Id: I447d83e5c5da8f6ba8515aab77a8039fe9cb2cc4
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Jason Zhu
Joseph Chen
Zain Wang
Lin Jinhan
YouMin Chen
Wyon Bi
Jianqun Xu
Philippe Reynes
Jon Lin