Commit Graph

5 Commits

Author SHA1 Message Date
Joseph Chen a1b32c2412 irq: clean up code
remove unused code and fix compile warning.

Change-Id: I912eff25bf60da925791b889f08e91d4fcb61893
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2017-12-28 15:23:35 +08:00
Zhangbin Tong b0deaf6841 irq: rockchip: add pwm hardware irq number
Change-Id: Idfb344703cc842a6d41a69771bd2a36065b01aaf
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
2017-10-25 10:32:09 +08:00
Joseph Chen 6d0f6303ec irq-platform.h: add timer1 irq number definition
Change-Id: I866f0aac9561a8cbe56d87a746aef259883be28e
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2017-10-17 17:25:47 +08:00
Joseph Chen 778da45f0b irq-platform.h: rk3128: add irq numbers definition
Change-Id: Idf3f3f1342bc1339d9e5efbe70d9ae7e059f50af
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2017-10-17 17:25:42 +08:00
Joseph Chen 4e6670fe63 drivers: add irq interrupt framework support
This patch add support for IRQ interrupt, FIQ not included.
It will be enabled when you select CONFIG_GICV2 or CONFIG_GICV3.

The framework support gic interrupt and gpio interrupt, relative APIs
are provided in: ./include/irq-platform.h

If you'd like to add a new platform support into interrupt framework,
please follow the steps:
1. add relative definitions in the file like other platforms:
   	./include/irq-platform.h

2. add GICD, GICC and GICR(for GICV3) base address definitions in the
   rkxxx-common.h, they are needed in: arch/arm/cpu/armv8/start.S;

3. enable CONFIG_GICV2 or CONFIG_GICV3.

Notice:
1. the framework is initialize in function 'interrupt_init()' of
   _sequence_r[]. So you should not request irqs too early.

2. IRQ stack size is configured by CONFIG_IRQ_STACK_SIZE, the default
   value is 8KB when CONFIG_IRQ_STACK_SIZE is absent.

Change-Id: I3d9e29873c9d64cd28aabd13a61111438c5902b0
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2017-09-27 10:34:17 +08:00