Commit Graph

48935 Commits

Author SHA1 Message Date
Joseph Chen 8d8025afc0 common: rkimg: print MMC speed and mode
refer to: print_mmcinfo() in ./cmd/mmc.c

Change-Id: I652132417e7df96b3a286f6ceeb66e60150b435b
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-06-17 17:41:33 +08:00
Yifeng Zhao fa93589458 rockchip: configs: rk3308: add nand flash sys config
Change-Id: I6d2363b4e79a216fde4ace26f1eccb29767a5ac0
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
2019-06-17 17:29:32 +08:00
Yifeng Zhao 332967ae48 common: spl: nand: support load rockchip images
Change-Id: Idd71eda22b4aabde695d69fbd06c0a3fdb554495
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
2019-06-17 17:28:54 +08:00
Yifeng Zhao dedb7deff0 drivers: mtd: nand: add nand driver for spl
Change-Id: Ic4cd26fb670eaef7778caf045bb4be3ce89ebf29
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
2019-06-17 17:19:40 +08:00
Frank Wang 19652be07e gadget: rockusb: fix cmd exception for r/w vendor storage
It should be marked sense_data error when r/w vendor storage failed.

Change-Id: I7e298d4f700ac3ca9648e973258cff521c41ec03
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
2019-06-17 14:24:47 +08:00
Joseph Chen 3e45175eae rockchip: board: fixup cru phandle for all U-Boot node.
There is a phandle miss match between U-Boot and kernel dtb node,
the typical is cru phandle, we fixup it in all U-Boot live dt nodes
which has property "clocks" or "assigned-clocks".

Change-Id: Id5769195ad54a7ba1cc06ed5cfb68ebcddfd3382
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-06-14 18:22:57 +08:00
Joseph Chen 04539b46d5 dm: core: add function dev_write_u32_array() to write u32 array values
Change-Id: I6633395c7704eefff59c2145562fe239e21f3b35
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-06-14 18:22:36 +08:00
Joseph Chen 7b4692447b common: rkimg: set download boot mode as the highest priority
Anyway, we should promise the user can enter download mode by
kernel command: reboot bootloader/loader/fastboot.

Change-Id: I23181a2f672774070f93478a338622be622900a0
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-06-14 11:40:48 +08:00
Joseph Chen 224307fea3 make.sh: fix "ls: cannot access *_loader_*.bin: No such file or directory"
Change-Id: I46885f5a59a4ecfa25ad2ab95965732edbb722fe
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-06-14 10:45:51 +08:00
Joseph Chen daa3bef505 make.sh: support pack spl/tpl loader and u-boot.itb
Usage:
	./make.sh spl		--- pack tpl+spl
	./make.sh spl-s		--- pack spl
	./make.sh itb		--- pack u-boot.itb

itb: Only support pack bl31 into u-boot.itb on 64-bit platform.

Change-Id: I2279ec8c961208160c324a6ade8afe9b8f2713f8
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-06-14 10:44:55 +08:00
Andy Yan 3e15af6d1a rockchip: rk3308: enable spl relocation
Relocate spl to a high address(48M + 4KB) to avoid
overlap wit ATF.

Change-Id: Iae767d7e5b18b24872d2a6975ef25b2146f05095
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2019-06-14 10:30:16 +08:00
Andy Yan 4f2858296b rockchip: rk3308: Enable SPL loading U-Boot as a FIT
Change-Id: Ide8f42aeb5ba9fd80bb66540d9e39cd04b04f9e0
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2019-06-14 10:30:11 +08:00
Andy Yan 951488b02b rockchip: rk3308: enable spl build
As rk3308 is a aarch64 based soc, we only let
it run spl on aarch64 excution state. But for
u-boot stage, it may run on aarch32 or aarch64
state.

Change-Id: I592375aef19a35f10555f7c5b991445cf02c4543
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2019-06-14 10:30:07 +08:00
Joseph Chen 4807f529b8 common: spl: mmc: support load rockchip images
Change-Id: I200c052f61e8c3fdda91ed5447ca54452080d641
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-06-14 10:29:57 +08:00
Joseph Chen d399273895 Makefile: u-boot.itb: call "mkfitimage" when kernel dtb enabled
This was a careless mistake.

fixes: 510e4046a6
(Makefile: u-boot.itb: use dt-spl.dtb if using kernel dtb)

Change-Id: Ifc8ad908356db55007ddd8e125543a6501cbe5da
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-06-14 10:09:16 +08:00
Joseph Chen 13c5d8ec8c rockchip: spl: add rockchip image load support
This patch add SPL support to load rockchip images(trust and U-Boot).

Change-Id: I4f66dbd26af051feb93dfaca57062fd31b3dc695
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-06-14 09:27:54 +08:00
Joseph Chen dfcfb4f4f7 common: spl: printf message when jump to ATF
Change-Id: Ibd970ffc3078c3bbe93cbd65698052cd913a31f6
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-06-14 09:27:54 +08:00
Joseph Chen 1620aad4c9 common: spl: atf: add bl32/bl33 entry point to struct spl_image_info
This allows other booting device to initial other firmware entry
point, but not only FIT.

Change-Id: I73b08d594079ce0842b68f1c9d222f58e171b555
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-06-13 12:21:29 +08:00
Joseph Chen 64d1b263e7 common: spl: atf: export bl31_entry()
Change-Id: I7c628ba567ca554caa5902e6aa6592282ccf167d
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-06-12 14:15:58 +08:00
Yifeng Zhao c8d12fd617 drivers: rknand: zftl fix cache flush misaligned range
bug:
CACHE: Misaligned operation at range [71e1eb80, 71e1eba0]
CACHE: Misaligned operation at range [71e1eb80, 71e1eba0]
CACHE: Misaligned operation at range [71e1eb80, 71e1eba0]

Change-Id: Id77a8f8df8e014e8de5dc0845ee0e3dd5d945f97
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
2019-06-11 09:47:05 +08:00
Shixiang Zheng ffa55e1823 video/drm: add panel node parameters for screen rotate
Change-Id: I83112f8a05bd301327d7d1ca21eda97594d95823
Signed-off-by: Shixiang Zheng <shixiang.zheng@rock-chips.com>
2019-06-11 09:30:25 +08:00
Jason Zhu cb0376d1ac rockchip: test: emmc: add read/write count for emmc test
Usually, we test the eMMC speed by reading and writing several times
and then taking the average. So add parameter count.

Change-Id: I0a01804b4b35b4a6d9dc8c96ac2bce6a4607301b
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
2019-06-06 15:07:39 +08:00
Lin Jinhan 5d8287bf26 dm: crypto: support crypto v2 test
Change-Id: Ia6247f9d91780cebf7806a3c7fb606fe0a2de004
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2019-06-06 15:00:04 +08:00
Lin Jinhan b353a43c9e crypto: add rockchip crypto v2 driver
Crypto v2 driver implements algorithm below.
Hash: MD5/SHA1/SHA256
RSA : RSA512/RSA1024/RSA2048/RSA3072/RSA4096
for the platforms: px30/rk3326.

Change-Id: Ia3b3233f3d17db1c98da60aa8dd1cd26aed7b260
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2019-06-06 14:59:32 +08:00
Lin Jinhan f8681eaa25 rockchip: dts: px30: add and enable crypto node
Change-Id: Ie8945a1e693e4673ea8863ef5a579e730c32ba66
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2019-06-06 14:59:32 +08:00
Joseph Chen b07f31ddba core: dump: add "*" for node from U-Boot dtb
This is useful for debugging.

Change-Id: If6a6e29053c1519ec40ccbcb183e35ffd81c64e8
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-06-06 09:13:10 +08:00
Jason Zhu 054229abb7 mtd: support mtd block model
Attach the mtd driver to block device, then we can call common interface
(blk_dread & blk_dwrite) to operate storage in application layer.

Usage:
Open CONFIG_MTD_BLK & CONFIG_MTD.

Change-Id: I47a969322e2d20c12d46898bdc88f4104e1a15bf
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
2019-06-05 14:47:56 +08:00
Jason Zhu 4b7e9c7e37 nand: delete useless conditional statement
The alignment operation is always done by nand driver,so there is
no need to do alignment operation in nand logical level.

Change-Id: Ic08652e7a9574a5c8eebd505c66dc55b1e0ddce3
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
2019-06-05 14:47:56 +08:00
Hisping Lin d47d99649e lib: optee_client: v1 add security partition offset when backup data
Change-Id: I331b95c1df8c0124568aad5ee7351bc270946af6
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
2019-06-05 12:30:21 +08:00
Hisping Lin e8c34540a6 lib: optee_client: v2 add security partition offset when backup data
Change-Id: I9abbef68e56c0b2870426e91138bb110240ed69c
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
2019-06-05 12:30:21 +08:00
Joseph Chen 6999767bb2 dm: regulator: add "regulator-loader-ignore" property support
The property indicates this regulator should skip init setting
sequence, usually for saving boot time.

Change-Id: I40a81c84b0696c70b16ddba50aeb457412287116
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-06-03 18:25:08 +08:00
Joseph Chen ea4b8016c1 core: device_bind_common: always use crypto node from U-Boot dtb
There is not crypto node in kernel dtb for early platform(such as
rk322x/rk3288/rk3368/rk3399, etc), so we decide to add crypto node
always in U-Boot dtb and ignore crypto node from kernel dtb.

This is a way to compatible with early platforms. Actually, we
need crypto during secure boot sequence, the crypto had better
not depends on kernel dtb.

Change-Id: Ibab4fca0741b45042b8d0868240449fb6b52aa14
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-05-31 17:31:14 +08:00
Joseph Chen 48802b420e env: Kconfig: fix typo
Change-Id: I02f0d7e83ab216e8cecba9d8f3e3a9b223afaed4
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-05-30 14:18:15 +08:00
Jason Zhu ce7f8a1146 arm: rockchip: rk3308: grf: add more register
Change-Id: I008a22e3dccd61b928a0f565791f1abef4d279de
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
2019-05-29 15:00:16 +08:00
Joseph Chen f9ebf7a1de crypto: rockchip: v1: use BITS2WORD() for sha final
Adding error message for missing total data length when sha init.

Change-Id: Ibbd266a36ba1498ab4ab5c85ecbb68c548a89a86
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-05-28 20:31:28 +08:00
Joseph Chen d7a244f923 core: device_bind_common: only delete U-Boot existance node
Use "u-boot,dm-pre-reloc" to identify whether the existance
node is from U-Boot or not. This avoids deleting the same name
nodes from kernel dtb.

Change-Id: I6503965c0013053feefad7e93f98b01b5af71f44
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-05-28 20:31:02 +08:00
Joseph Chen 039bc38d48 make.sh: add rk3326 aarch32 build support
Change-Id: Ibfc6a40b5d0decbffdbf4e797459da189484ce88
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-05-28 20:30:40 +08:00
Joseph Chen 5202fe1fb4 make.sh: improve aarch32 build
Change-Id: I7e39b0cb71a534cf073d38f2bab28069dbad1b26
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-05-28 20:30:40 +08:00
Joseph Chen 9ad51843bf configs: add rk3326-aarch32_defconfig
Enable using kernel dtb.

Change-Id: I2a450300509c81f9cc41af7f57fe40d87d8419be
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-05-28 20:30:40 +08:00
Joseph Chen 6db22b33e7 rockchip: rk3326: add AArch32 execution state support
Support boot ARMv8 based RK3326 on AARCH32 state

Change-Id: Ifb788ba71057f4f72dba9e1071c3609308644a9b
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-05-28 20:30:40 +08:00
Joseph Chen 39c46c24ef common: android: correct kernel memcpy size when load separate
The hdr->page_size should be included.

fixes: 503a892f5a
(common: android: avb support load android image separate)

Change-Id: I2de2c9957fd47c7f95bf863f7b0c679cc64633d9
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-05-28 20:30:36 +08:00
Joseph Chen 459505b334 common: rkimg: fix uncompress region check issue
kernel_addr_r is defined in the function entry, we should not
define it agin, otherwise the behind code is someting wrong.
(images.ep = kernel_addr_r;)

Change-Id: If6a4c01e8ecdf130b800bd3884a5cfbe158d8f9a
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-05-28 20:30:36 +08:00
Joseph Chen 160c99aa45 rockchip: param: add common memory reserve for most AArch32 mode
The ARMv8 platform enabling AArch32 mode should reserve memory the same
as AArch64 mode(because there is no difference about ATF), only some
platform has special request, they are: RK3308.

Change-Id: I0ffbfac7ddaff50ef53128dccd5b7dc2d02b560a
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-05-28 20:30:36 +08:00
Joseph Chen 598774ec05 lib: sysmem: add optimization for input base and M_ATTR_PEEK
- handle the case: the input base is 0;
- ignore the head region which can't visible for M_ATTR_PEEK;

Change-Id: I2c3609b9457a5e2e429e849228301bfee0e4c9b0
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-05-28 20:30:36 +08:00
Joseph Chen 7328d2324e ram: rockchip: fix AArch32 compile issue
error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]

Change-Id: Iadcf7065f02ee779d3eeee1cb70fd3e9905e1b3f
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-05-28 20:30:36 +08:00
Yifeng Zhao a7784f2995 drivers: rknand: add slc nand and some new MLC nand support
Change-Id: I13c9d56c80c6e817f591b55ea31672681565d274
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
2019-05-28 20:30:36 +08:00
Joseph Chen 27643361d9 common: android: add/update boot message
Make android bootflow more clear by message.

Change-Id: I6e022ae6fd22ce4b6933b085033c66b7bf79297c
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-05-28 20:30:36 +08:00
Joseph Chen 2e6f3f4c09 tool: rockchip: boot/trust_merger: ignore prepath when it's already exist
Change-Id: I33b1b14ba7b68ab08e1e61bf98e476da3b13b56a
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-05-27 11:15:19 +08:00
Joseph Chen 05b87a4eed make.sh: remove exist image before pack
Change-Id: Iea5083970bbd332ec62250a6d1e35ac09dbed533
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-05-27 10:04:13 +08:00
Shengfei Xu 4874919d22 power: pmic: rk8xx: get the correct on/off source
The on/off_source value has been changed,
so we can't get the correct on/off source.

Change-Id: I7c522574f5e8d3bbc3c5d73980cdccdb4717da52
Signed-off-by: Shengfei Xu <xsf@rock-chips.com>
2019-05-27 08:36:09 +08:00