dtimg command allows user to work with Android DTB/DTBO image format.
Such as, getting the address of desired DTB/DTBO file, printing the dump
of the image in U-Boot shell, etc.
This command is needed to provide Android boot with new Android DT image
format further.
Change-Id: I2a626f333f604b6f0424aa03feaddab4e8506a3f
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
(am from http://patchwork.ozlabs.org/patch/925871/)
Android documentation recommends new image format for storing DTB/DTBO
files: [1]. To support that format, this patch adds helper functions for
Android DTB/DTBO format. In image-android-dt.* files you can find helper
functions to work with Android DT image format, such us routines for:
- printing the dump of image structure
- getting the address and size of desired dtb/dtbo file
This patch uses dt_table.h file, that was added in 643cefa4d848 ("Import
Android's dt_table.h for DT image format") by Alex Deymo.
[1] https://source.android.com/devices/architecture/dto/partitions
Change-Id: I78f6750af6c4fecb80d331bc06bc5cbe98da5825
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
(am from http://patchwork.ozlabs.org/patch/925870/)
Android documentation defines the recommended image format for storing
DTB/DTBO files in a single dtbo.img image. This patch includes the
latest header file with the struct definitions for this format from
AOSP.
The header was adapted to U-Boot's coding style and the function
declarations were removed.
Change-Id: I4d3a452b600a6908f4b720b6e6c926c918be5630
Signed-off-by: Alex Deymo <deymo@google.com>
[trini: Change SDPX tag location]
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
(cherry picked from commit 643cefa4d848a9358951caab42b5f9cd15e4fb5f)
As clk_set_defaults() is removed in device core, so add it in clock
driver.
Change-Id: Ib5b9a7f81c738c65f2cb3e0ca74a410cda2ca1e2
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
The new print format can reduce startup time.
Change-Id: I7ea53e07b8245fe4b5ef1fa15dd1f6efb176db47
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
If the gpll and npll freq is no change,don't set pll once again.
Change-Id: Ib16a0a1ff56560997b6ed4b487fc2d56928c14ec
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Make clock ids consistent with kernel.
support more clks to set and get rate.
add clk init.
Change-Id: I1e6b5734887e0bd5d845f1286f10eb0e3e42bc08
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
set frame effect to fix mistake fild when in interlace mode.
Change-Id: Ic4e7b7134bd54aa65d31264a3e4625eebdc229c5
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
SPI Nand and Nand flash devices are supported
Change-Id: Ic4dbd5cf38bd46be474bb410224a9082bce1b5f2
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
If emmc driver config MMC_TIMING_MMC_HS, need config
controller SDHCI_HOST_CONTROL2 register SDHCI_CTRL_UHS_SDR50.
It will affect emmc phy work mode.
Change-Id: Ib45f30eb6b70bde6f1beb4612ded17ee2b24b5fe
Signed-off-by: chenfen <chenfen@rock-chips.com>
Priority to use cru division is better timing than use controller
division.
Change-Id: I8b7b9a9c99f09407f209fda8df6460136a3105e9
Signed-off-by: chenfen <chenfen@rock-chips.com>
1.Add vendor ops api for nand devices;
2.Remove unused headfile.
3.Make rkflash block driver reachable by other devices
Change-Id: I26129cb94382b0714b9c35f4dc6113ddb752251c
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
1.Under the control of sfc, SPI Nand and SPI Nor are registered as two
different if_type block dev and are both the child_dev of sfc:
a.Dev 0: blk_dev "rkflash", devenum 0, if_type SpiNand
b.Dev 1: blk_dev "rkflash", devenum 1, if_type SpiNor
Change-Id: Iaa90fdc5c0926495c989189b9ef9e317b70f23a4
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
1.In rkflash driver, SPI Nand and SPI Nor are registered as two
different if_type
block dev. They are both the child_dev of sfc;
2.Here we send cmd to "rksfc" to operate it's child-dev spi flash device.
Change-Id: I9314ef9c556f8cfbe023021bd66bebec137a4e71
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
1.when dm sfc of-match, it will bind two kinds of spi flash devices as
rkflash:
a.SpiNand, devnum 0, if_type IF_TYPE_SPINAND
b.SpiNor, devnum 1, if_type IF_TYPE_SPINOR
2.Publish type of rkflash product.
Change-Id: I393452b16640811e9b0217fe5e91e76bc84c7745
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
Different loader can not boot normally in cortex-A35,like rk3308,
because cortex-A35 enable icache in default.
Change-Id: I87f3e8a2539186f3e408fad8ea903c375118b1d9
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
remove CONFIG_SPL_LIBCOMMON_SUPPORT and CONFIG_SPL_LIBGENERIC_SUPPORT
defconfig for reducing spl size.
Change-Id: Ie7b1905c44976f8a62e2462acd455a6ec6bb8be7
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
add udelay(),hang(),memset() in spl.c when we do not config
CONFIG_SPL_LIBGENERIC_SUPPORT.
Change-Id: Ib6c5532af002b501659ee5964d3a09954f0b3fdf
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
We need vol+ key as recovery key for board to get into rockusb.
Change-Id: Ia1d80cb62695fa2208744ea62a0c6fec5d1e20a8
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Rockusb have to available so that we can use it even if there is
no avaiable kernel/resource image.
Change-Id: I39c22052f66fb7151eeb885b684d8fc1291dc3f4
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
We do not need to assign-clock for every driver in Rockchip platform,
only below module need this feature, remove it for boot time optimize:
- GMAC (need set parent from dts)
- CRU ARM clock (rockchip board will call set_armclk_rate() instead)
- VOP (need set parent)
Change-Id: Ie8facfb7499323f4649e0e1d908f850de1338e12
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
PX3SE loader/trust packing was broken since
d443b7d make.sh: parse RKCHIP from .config
This fixs px3se building with previous commit. And since we're
here, detecting the variant gracefully.
Change-Id: I5c7f5385a4cfd0d6beba842bd4766b77d8f67d88
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
PX3SE is a variant of RK3128, especially the loader and trust img.
Change-Id: I91f417957b5f3db503fdaa8f2f6c3271f46094b6
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Enalbe ADC keys to enter Rockusb mode by holding Vol Up
key and reset.
Change-Id: I2f17fccf890424049aff5946f439016ad76ea52d
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
The four power source types that are detected are:
Standard downstream port (SDP)
– This is a computer USB port capable of 500mA.
Charging downstream port (CDP)
- This is typically a powered USB hub capable of 1500mA.
Dedicated charging port (DCP)
- This is a standard wall charger capable of at least 1500mA.
DCP without shorting D+/D-(FLOATING)
- This is a non-standard wall charger capable of at least 1500mA.
Change-Id: Icb3d3c02d9ef5dfbcabf0232743ad057c578dcf4
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Joseph Chen
Zhangbin Tong
Sam Protsenko
Alex Deymo
Finley Xiao
Dingqiang Lin
Wyon Bi
Nickey Yang
Elaine Zhang
Sandy Huang
chenfen
Zhihuan He
Jason Zhu
shengfei Xu
Kever Yang
Shunqian Zheng
Jian Qiu