b50fa2962f
rockchip: dts: rk3568: Add flash devices to sfc node
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Change-Id: Icf0f4ac350dca388e91a6bf443c72422c4b95dd0
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-10-26 16:25:18 +08:00
cf85037cdc
rockchip: dts: rk3568: Add sfc node
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Change-Id: Id9df11a15d16dcf39b5415674224431d277bd8e4
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-10-26 16:25:18 +08:00
516562c2d3
spl: mtd_blk: support get image sector address by part info
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Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I85d5433ce165a8b027e485c694315c492467c6d9
2020-10-26 09:28:39 +08:00
46e7ba36f6
make.sh: compatible make_fit_atf.py and make_fit_atf.sh
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ia0ec8373d1a6aaf4a68bea7eafbc0f63a050f9b4
2020-10-23 17:39:27 +08:00
767626d1ad
rockchip: make_fit_atf.sh: fix typo
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I15230673c8a1de36dcf5105a73f8a3335e3921e8
2020-10-23 17:34:01 +08:00
407bd0fb9b
make.sh: rm bl31.elf and tee.bin before packing itb
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Iafc924a8d559f0ed12a8fbf2a127ff23898803ec
2020-10-23 15:57:31 +08:00
d2a405ffec
configs: rv1126: Enable otp
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Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I9066f7f51a305a9fbcb2291c3c081942d4128975
2020-10-23 15:06:11 +08:00
d3cb8b064e
rockchip: board: Add support for cpu-id parsed from otp
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Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I27350a847dd13cc7d1eb0cad481adccfead23bce
2020-10-23 15:06:11 +08:00
a4c57e8a07
rockchip: otp: Add support for rv1126
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This adds the necessary data for handling otp on the rv1126.
Change-Id: Ie78ad04861ee8dca506f0bb7b851570b360694de
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2020-10-23 15:06:11 +08:00
230491661d
io-domain: rockchip: add rk3568 support
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Change-Id: Ic3a984043e82bd65957239acc25de79e00e1a6b8
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-10-23 15:02:15 +08:00
3f4af2112b
pinctrl: rockchip: add rk3568 support
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Change-Id: Ie8c3d6f6a3909ab481241b98d3af55b26c38accc
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-10-23 15:02:15 +08:00
e8885e2486
drivers: ram: rv1126: dram 32bit interface use pageclose
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after system test, 32bit interface use pageclose can improve
performance, 16bit interface not improve.
Change-Id: Iecac7aae1e5f8ec4f162200d80be16f1b91180f5
Signed-off-by: CanYang He <hcy@rock-chips.com>
2020-10-23 15:01:23 +08:00
da1862e965
drivers: ram: rv1126: fix the timing about noc burstpenalty
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Change-Id: I1ce56c57f8798dfc4fbefd68d47fbe97de6c390a
Signed-off-by: YouMin Chen <cym@rock-chips.com>
2020-10-23 15:01:00 +08:00
656558394a
cmd: bootfit: add slot info to bootargs
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Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Iac5eb54568c03239183425ef8ac9c51f7d774cd6
2020-10-23 14:17:29 +08:00
d2fb2f92b0
configs: add rk3568_defconfig
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I2b0efd05fbedb0098db92405824536591fb79a6b
2020-10-22 19:39:19 +08:00
7e26af3867
rockchip: add rk3568 SoC support
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I2e163b93d4ec5a60f1ff9c589626d3ccd994f854
2020-10-22 19:39:19 +08:00
be7064f8f7
rockchip: dts: rk3568: add basic dtsi/dts
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Sync from kernel-4.19:
(85abcd6 phy: phy-rockchip-snps-pcie3: Initial support)
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I474a6f5bfdaf5f78655a121ac9dc08e3708de226
2020-10-22 19:39:19 +08:00
417bebc456
clk: rockchip: rk3568: Add clock driver
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Add basic clock for rk3568 which including cpu, bus, mmc,
i2c, pwm, gmac ...clocks init.
Change-Id: I4119f10897d06befa4a39198b3724dc515d416e3
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-10-22 19:39:19 +08:00
6b7c0aa59e
rockchip: dts: rk3568: sync from kernel
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sync from: ac723c clk: rockchip: rk3568: Replace RKNN with NPU
Change-Id: I24084626ef787f6fb7cbb8875365eb31fbea3541
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-10-22 19:39:19 +08:00
c42dfcf531
cmd: boot fit: support a/b system
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I37452ec5ce107f864594c94411dc59a422c7cf47
2020-10-22 19:38:57 +08:00
cee2fb0e57
common: android_ab: move the ab functions to android_ab.c
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Move the ab functions to android_ab.c and add "ab_" prefix to
api function.
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I4527a0c957aa7853a1b75d456ca3fabaf80c1c57
2020-10-22 19:38:57 +08:00
cf87ffd351
include: android_image: move some android common definitions to this file
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Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Ia0da707408bcd43b50b49cef89495af7f9d97cd7
2020-10-22 19:38:57 +08:00
edb7fa0ede
configs: rk3308-aarch32: disable distro/ext2/ext4/fat-write
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In order to decrease u-boot.bin size.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ia7ef7f535ed1a9c17492d55fa21c41bf3e10a710
2020-10-22 18:05:28 +08:00
e6124e0d48
configs: rk3308-aarch32: update with make savedefconfig
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: If540f32fca16a90f8a03c10ebb1506a04420d317
2020-10-22 18:05:27 +08:00
295b646621
spl: fit: print ATF and U-Boot load address
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I0b732934c1aa63ed6e849d85bd77fa8ec1f622b3
2020-10-22 16:37:49 +08:00
3db2d9fdeb
rockchip: weak: support soft gunzip image
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I645627b9e6c1e027be9532f25f3da7bc1e7b6928
2020-10-22 16:37:49 +08:00
c3723ef337
clk: rockchip: rk3399: support crypto clk set/get in SPL
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I159d062320ca523e8dc4f0dcce94a619692481f3
2020-10-22 16:37:49 +08:00
9b6b8f53f4
make.sh: show elf source of nm command
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I632ee35b42326516a0611878899335d338011e32
2020-10-22 16:37:49 +08:00
cb718016c1
make.sh: support pack fit uboot.img for armv8
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ieacddba103b0d072de84af9764e5f69e87126e83
2020-10-22 16:37:49 +08:00
392231a732
rockchip: add make_fit_atf.sh for armv8 to generate u-boot.itb
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Add support:
- decode bl31.elf to binary;
- include tee.bin dynamically;
- none or gzip compression;
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I483cb81b6ab05a89fd0df3a2a7d95e6ff3ad6636
2020-10-22 16:37:49 +08:00
9e84e21cf4
configs: rv1126: use make_fit_optee.sh as fit generator
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I31237cbcefcd62a0abbe7a549f46ad41f646ac55
2020-10-22 16:37:49 +08:00
65a17145ae
rockchip: make_fit_optee.sh: sync from rv1126_make_fit.sh
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Iaa3dc834b9e49e025d9feed1c03965ef2f1a4f35
2020-10-22 16:37:49 +08:00
c45a6d11b5
rockchip: rv1126: fit: clean coding style
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ibfba9e70d3d5bcae8bd6850ab546edc736f56ba4
2020-10-22 16:37:49 +08:00
a9c93f9d80
rockchip: make_fit_args: support make u-boot.itb command
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The command pass board dtb as arg1.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ie96ad09665698904978caca82ec38843930ed09e
2020-10-22 16:37:49 +08:00
45dfd9925e
rockchip: make_fit_atf.py: remove '@1' of nodes
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I9a398826213dd66df58aeac985146997e085f7d1
2020-10-22 16:37:49 +08:00
6524556d8d
mtd: mtd_blk: Fix the way to get Nand mtd_info
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Change-Id: I6e47180db41242a92ac74083d5984bcb06d92e9c
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-10-19 11:00:29 +08:00
6f8d5ecc09
spl: nand: add mtd erase size config for mtd blk
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The mtd blk need mtd erase size to check bad block.x
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: If1bca0ce442599be41f3fd12638529018885f3e0
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-10-16 17:57:43 +08:00
3ac03e839f
mtd: spinand: Support FM25S02A
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Change-Id: I855a01500977285c4b8eb09ec1c013a4cdb5636e
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-10-15 16:02:18 +08:00
ea89190d3a
rockchip: vendor: Deinit bootdev_type if initial process fail
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Change-Id: I1da43b5e576bfc3410c30794986975f2cb0ee092
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-10-13 19:30:07 +08:00
a04950ce79
rockchip: rv1126: init QoS for ramboot
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There is not SPL for ramboot, let's init QoS for it.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ib6221122c44702cb4f287bad721316751478be71
2020-10-12 15:38:21 +08:00
9a4028eb5b
rockchip: rv1126: Set BOOT_WATCHDOG flag if reset by WDT
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Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Ia3d437c33ae9a7d3f666df70c484e1e6b28a90e5
2020-10-12 11:48:11 +08:00
b444b7fa1e
rockchip: rv1126: fix typo
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: If26223219d3f0e3d6ca37b6bc0c740411a87fe01
2020-10-10 16:17:06 +08:00
e7498cb05b
common: android: show ramdisk size of boot and vendor-boot
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ia8eca7010989e64d10b09628a12bcfc5aaeb988c
2020-10-10 16:17:06 +08:00
9f568152b6
rkflash: Fix last data block vpn has been modify issue
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Change-Id: Ie3aa7140c368693ddd18a53225975ec2fd6ce141
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-10-10 14:54:28 +08:00
a964d8e5bb
clk: rockchip: rv1126: mux partial clocks to GPLL for tb
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Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: I33d2396d0de5bb5fc81990a1ae10e4c80f45e5cd
2020-09-30 17:36:47 +08:00
eeb4ca8743
rockchip: rv1126: mux clocks to none-cpll
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Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: Ida1561569814d6a139818820940012ce7b9f856b
2020-09-30 17:36:40 +08:00
796dfc0875
rockchip: rv1126: Adjust the parameters of GPLL's VCO for THUNDER_BOOT
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Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Change-Id: Ib322b62c1adbe355c2d64488fb33266bca974ea5
2020-09-30 14:51:19 +08:00
ce2eb8d1fb
disk: efi: handle factory image gpt
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The factory image doesn't know the correct emmc capacity, so it use
0xffffffff as the size, in this case:
- The primary gpt header's last_usable_lba is (0xffffffff - 34)
- The backup gpt table is missing
We need to fix these two issues.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: I8a1fa65b0af1723017c87d52b4ef594353ce46ff
2020-09-29 09:31:54 +08:00
95522b57e0
disk: efi: do not fix the gpt error at SPL in normal boot
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We handle the error at U-Boot stage instead of SPL stage in normal case,
still need to do this in SPL when there is no U-Boot proper.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: I008caaa0d1f95316fc0b87cb55de35d8f8e31b36
2020-09-29 09:31:16 +08:00
1252bc90e4
rockchip: rv1126: config PMU_NOC_AUTO_CON
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When perform idle operation, corresponding clock can
be opened or gated automatically.
Change-Id: Ib33115024b3f85f1f8bcabf2548caf3b13b0361f
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-09-28 14:44:07 +08:00
Jon Lin
Jason Zhu
Joseph Chen
Sugar Zhang
Finley Xiao
Jianqun Xu
CanYang He
YouMin Chen
Elaine Zhang
Yifeng Zhao
Ziyuan Xu
Nickey Yang
Kever Yang