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Author SHA1 Message Date
Shawn Lin fae486e407 power: regulator: Use dev_read_size in gpio-regulator 
Change-Id: Iff2e643d6dad6975fe0838dc439a31ecd5299f41
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
 2021-01-08 09:24:05 +08:00
Yifeng Zhao 7cd717205f drivers: rknand: zftl: fix to support samsung ss14 8GB NAND FLASH 
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I86d47db8988b56d36ae76d08997c840b34f0b0d8
 2021-01-07 10:39:27 +08:00
Shawn Lin bc58f2110b drivers: pci: Add Rockchip DesignWare based PCIe controller 
=> pci enum
PCIe Linking... LTSSM is 0x1
PCIe Link up, LTSSM is 0x230011
PCIE-0: Link up (Gen3-x2, Bus0)

=> pci scan
Scanning PCI devices on bus 0
BusDevFun  VendorId   DeviceId   Device Class       Sub-Class
_____________________________________________________________
00.00.00   0x1d87     0x3566     Bridge device           0x04

=> pci 1
Scanning PCI devices on bus 1
BusDevFun  VendorId   DeviceId   Device Class       Sub-Class
_____________________________________________________________
01.00.00   0x144d     0xa808     Mass storage controller 0x08

=> nvme scan

=> nvme details
Blk device 0: Optional Admin Command Support:
        Namespace Management/Attachment: no
        Firmware Commit/Image download: yes
        Format NVM: yes
        Security Send/Receive: no
Blk device 0: Optional NVM Command Support:
        Reservation: yes
        Save/Select field in the Set/Get features: yes
        Write Zeroes: yes
        Dataset Management: yes
        Write Uncorrectable: yes
Blk device 0: Format NVM Attributes:
        Support Cryptographic Erase: No
        Support erase a particular namespace: Yes
        Support format a particular namespace: Yes
Blk device 0: LBA Format Support:
Blk device 0: End-to-End DataProtect Capabilities:
        As last eight bytes: No
        As first eight bytes: No
        Support Type3: No
        Support Type2: No
        Support Type1: No
Blk device 0: Metadata capabilities:
        As part of a separate buffer: No
        As part of an extended data LBA: No

=> nvme info
Device 0: Vendor: 0x144d Rev: EXD7201Q Prod: S444NA0M384608
            Type: Hard Disk
            Capacity: 244198.3 MB = 238.4 GB (500118192 x 512)

=> nvme device 0

=> md.l 0x40000000 1
40000000: d08ec033                               3...
=> mw.l 0x40000000 0x55aa55aa
=> md.l 0x40000000 1
40000000: 55aa55aa                               .U.U

=> nvme write 0x40000000 0x0 0x1

nvme write: device 0 block # 0, count 1 ... 1 blocks written: OK

=> md.l 0x44000000 1
44000000: ffffffff                               ....
=> nvme read 0x44000000 0x0 0x1

nvme read: device 0 block # 0, count 1 ... 1 blocks read: OK

=> md.l 0x44000000 1
44000000: 55aa55aa                               .U.U

Change-Id: I645dfc7e88722e9948ecb6e1a3a589eb4b420c1f
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
 2021-01-07 10:00:59 +08:00
Shawn Lin 76ab734171 phy: Add Rockchip Synopsys PCIe 3.0 PHY 
Change-Id: Ie29e4777f8f0603b779cc3387dc5c4b63336deff
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
 2021-01-07 10:00:59 +08:00
Shawn Lin 80907d3c4c core: device: Add PCIe to bind list if we set GD_FLG_RELOC 
Change-Id: Ib115bc6eb52f8a08e28805ea15e2cbf8f27f5f63
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
 2021-01-07 10:00:59 +08:00
Shawn Lin d504dfb2b1 clk: rockchip: rk3568: Ungate PCIe30phy refclk_m and refclk_n 
Change-Id: I718f280cd78235131f3f3ef76e17e498a6e4db8e
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
 2021-01-07 10:00:59 +08:00
Shawn Lin cd282fabfa power: regulator: Migrate to dev_read_u32_array for gpio-regulator 
fdtdec_get_int_array_count is obsoleted and we should use
dev_read_u32_array for seeking node members.

Change-Id: I666bd7317cfa203229454d24c910049c24bf8a2f
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
 2021-01-07 10:00:59 +08:00
Yifeng Zhao 813156ed32 drivers: mtd: nand: support slc nand for rk3568 
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Id9bc21f8fb443574ad150c32b9c6980e2e038ca7
 2021-01-07 09:28:32 +08:00
Elaine Zhang 2f5dff11cb thermal: rockchip: support rk3568 
Change-Id: Icb4d127a9d9c3f599a141c69c7c759da6e38cf36
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
 2021-01-07 09:24:58 +08:00
Jon Lin 43f2461c06 mtd: spinand: Add optional configuration for different devices 
Change-Id: If3d66f2f48f7322493175cdfba46d563b760b44c
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2021-01-06 15:34:03 +08:00
Jason Zhu 5b4dcfe0cf spi: rockchip_sfc: set clock depended on CONFIG_IS_ENABLED(CLK) 
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Icb3662d97eeea8db1e1a62f633f9ba4de9b72dde
 2021-01-06 15:29:39 +08:00
Jason Zhu a0166cc6be mtd: Kconfig: add a Kconfig option to enable the support for MTD block write operations 
This allows using CONFIG_IS_ENABLED(SPLMTD_WRITE) to compile out code
needed only if write support is required.
The option is added for u-boot and for SPL.

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Ia48169fcd601ad51d1723923ed71d610901275e1
 2021-01-06 15:29:34 +08:00
Yifeng Zhao c7c3548ddf drivers: Makefile: add block layer while enable rknand 
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I8fc7b3d27e32d767da3597d3d5b7a6aa4a48ca40
 2021-01-06 14:54:48 +08:00
Jean-Jacques Hiblot 9127fbf440 UPSTREAM: mmc: add a Kconfig option to enable the support for MMC write operations 
This allows using CONFIG_IS_ENABLED(MMC_WRITE) to compile out code
needed only if write support is required.
The option is added for u-boot and for SPL

Change-Id: Ibb3836ed8713e491238460783a85ee1808770f66
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
(cherry picked from commit d6400c3f8520bb9a203fe397039279c80f093c27)
 2021-01-04 17:12:30 +08:00
Ziyuan Xu 658285c1fb clk: rockchip: rv1126: mux aclk_pdbus according to frequency 
Aim to reduce power consumption, cpll should be gated and the clocks
will mux to non-cpll.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: If9d1b48cdb237cf38133523a4fc20fa6e87e8e62
 2020-12-31 14:39:56 +08:00
Algea Cao 5ccad8f6bf drm/rockchip: hdmi: Support RK3568 dw-hdmi 
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I3c9275a44c519c3927ea7199147a738d4c2a1334
 2020-12-31 14:38:43 +08:00
Algea Cao 10ee9f5b51 drm/rockchip: vop2: Add support for hdmi 
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I6043fad382c48670c765bce67a3f291a0fc66bd5
 2020-12-31 14:38:43 +08:00
Wenping Zhang 449de1d380 video/rk_eink: Only initilize the eink driver on the first time. 
This commit fix hardware without eink screen continue outputing
eink log during charging.

Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
Change-Id: I1b14f0cd921342d1efb83dc72be6829a157be6d9
 2020-12-30 16:05:17 +08:00
David Wu 33a014bdc9 net: gmac_rockchip: Add rk3568 gmac support 
Change-Id: I3de9899a27160f5acccc04cd1ac03b406e4b3296
Signed-off-by: David Wu <david.wu@rock-chips.com>
 2020-12-29 18:06:54 +08:00
David Wu befcb6277d net: gmac_rockchip: Prepare for rk3568 gmac support 
Change-Id: Iada7af00c052a7ebe7e6b702ada2bd2ef585a913
Signed-off-by: David Wu <david.wu@rock-chips.com>
 2020-12-29 18:06:54 +08:00
David Wu ee1ce3c58a pinctrl: rockchip: Use gmac1_rxd0 to select M0 and M1 
Change-Id: Idba7d638d4fc55b1c163a3fa104c04345a74e51c
Signed-off-by: David Wu <david.wu@rock-chips.com>
 2020-12-29 18:06:54 +08:00
Joseph Chen 00f93bdf98 drivers: pci: separate SPL & U-Boot proper build 
It fixes SPL compile issue after PCI enabled.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ic3d4a464defd2074be083effd25f513ae19d2e01
 2020-12-29 16:35:35 +08:00
Jon Lin 9148182d3c mtd: mtd_blk: Support SPI Nor blk_derase 
Change-Id: I1be6dfc1fa7acd25f98031f48002abf13479418c
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2020-12-29 14:45:29 +08:00
Guochun Huang bee25ee674 video/drm: remove DSI special assign 
these flags will be used by other output interface, so remove
DSI special assign.

Change-Id: Ieb3a20e62c2b899e6757635eced86b85e1fb22f7
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
 2020-12-29 14:43:12 +08:00
Wyon Bi 699c29a5d8 video/drm: analogix_dp: Add support for rk3568 
This patch adds support for Analogix eDP TX IP used on RK3568 SoC.

Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Ia48f1f99f336d4d98d5fba4e5fd15a35bdbaf373
 2020-12-28 09:54:03 +00:00
Wyon Bi c5b1fb658e video/drm: Add dp helper 
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I559f7288038c9b1128f64e56ea7f156a1f643f33
 2020-12-28 09:54:03 +00:00
Wyon Bi a6285d17cb video/drm: analogix_dp: Move PLL lock check to analogix_dp_set_link_bandwidth() 
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Iffd2ff42de9102cf0293cf7bb68422dd6331474b
 2020-12-28 09:54:03 +00:00
Wyon Bi 253c2dc8a6 video/drm: analogix_dp: Simplify analogix_dp_{set/get}_lane_link_training helpers 
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I5e0a90c8a1fd132567635a7751c1ca4ade38e692
 2020-12-28 09:54:03 +00:00
Wyon Bi d90a0d9f94 video/drm: analogix_dp: Implement detect callback 
Change-Id: I1e6746768092747920afcb3af07e36c1ecae9856
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
 2020-12-28 09:54:03 +00:00
Wyon Bi cf9110094e phy: Add driver for Rockchip Naneng eDP Transmitter PHY 
DPTPHYT22ULP is designed for chips that perform eDP/DP data
communication while operating at low power consumption.
The main link is a multi-gigabit transmitter macro which
enable speed up to 4.0Gbps data transmitter with optimized
power and die size, also it can be easily fabricated and
implemented in a video system. The AUX channel is a halfduplex,
bidirectional channel consisting of one differential pair,
supporting the bit rate of about 1Mbps.

Macro consists of multi-main link transmitter channels,
AUX channel, one PLL and bias-gen unit. The main link
transmitter performs dedicated P2S, clock generator,
driver with preemphasis and self-test. Each of the channels
can be turned off individually.

Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Ic60d8bb86a53f686e8c46323b58d099c727a36d3
 2020-12-28 16:41:39 +08:00
Wyon Bi 4ef09685de phy: Add configuration interface 
The phy framework is only allowing to configure the power state of thePHY
using the init and power_on hooks, and their power_off and exit
counterparts.

While it works for most, simple, PHYs supported so far, some more advanced
PHYs need some configuration depending on runtime parameters. These PHYs
have been supported by a number of means already, often by using ad-hoc
drivers in their consumer drivers.

That doesn't work too well however, when a consumer device needs to deal
with multiple PHYs, or when multiple consumers need to deal with the same
PHY (a DSI driver and a CSI driver for example).

So we'll add a new interface, through two funtions, phy_validate and
phy_configure. The first one will allow to check that a current
configuration, for a given mode, is applicable. It will also allow the PHY
driver to tune the settings given as parameters as it sees fit.

phy_configure will actually apply that configuration in the phy itself.

Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Icd170eaef9a1dbe21e0c7664b797a27877c703b5
 2020-12-28 16:41:39 +08:00
Vignesh Raghavendra 37a5e4d859 UPSTREAM: phy: Fix possible NULL pointer deference 
It is possible that users of generic_phy_*() APIs may pass a valid
struct phy pointer but phy->dev can be NULL, leading to NULL pointer
deference in phy_dev_ops().

So call generic_phy_valid() to verify that phy and phy->dev are both
valid.

Change-Id: I0d19180ae8524eb240f4afd6ea55d5d0f2907798
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
(cherry picked from commit 64b69f8c89352975c25730bcca4bf8af2296297f)
 2020-12-28 16:41:39 +08:00
Jean-Jacques Hiblot 1bac1f3947 UPSTREAM: drivers: phy: Handle gracefully NULL pointers 
For some controllers PHYs can be optional. Handling NULL pointers without
crashing nor failing, makes it easy to handle optional PHYs.

Change-Id: I11c95af8c1b54f2dad41891f6d0edb8d9fac6606
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
(cherry picked from commit 4e1842988364446ba0cf2171d1eebb53c15bc44e)
 2020-12-28 16:41:39 +08:00
Guochun Huang 0220733d75 drm/rockchip: remove initialization of conn_state->output_if 
Change-Id: I9f00db573fd411dc6ea977abfedb562d2e4116b6
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
 2020-12-28 16:37:08 +08:00
Joseph Chen ef5a68b123 core: device: always use wdt from U-Boot 
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Icedfecb6de80cb9dc1a71118e7271e2b7b66e90c
 2020-12-28 16:19:25 +08:00
Elaine Zhang 6c0e8ad896 clk: rockchip: rk3568: support wdt clk set/get rate 
Change-Id: I04b868618f0590b44cea8c00041b9fb676e55919
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
 2020-12-28 16:19:25 +08:00
Elaine Zhang 1abad17a96 clk: rockchip: rv1126: support wdt clk set/get rate 
Change-Id: If47a22130507cb3512a8f19b474ea1e01354b52b
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
 2020-12-28 16:19:25 +08:00
Jon Lin 45f0941d2b mtd: spi-nor-ids: Add Gigadevice gd25q256 ID 
Change-Id: I70aca02c537b67cd0c92c3067d903763f528a1e8
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2020-12-28 14:45:26 +08:00
Jason Zhu 59f02c0900 misc: rename the ROCKCHIP_SECURE_OTP to ROCKCHIP_SECURE_OTP_V1 
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Id0db096848d0ed1137c5153e80e66b37356e3273
 2020-12-28 14:12:09 +08:00
Jason Zhu 18481d05b7 misc: rockchip-otp: update the rk3568's secure area 
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Ia787f9c4e67e311fe4cc4e5b8f0c674221f36d8b
 2020-12-28 14:12:03 +08:00
Elaine Zhang aa00306883 clk: rockchip: rk3568: fix up the return value for rk3568_clk_set_rate() 
Change-Id: If472e1b954624ff5205e3064d484de3533cde949
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
 2020-12-24 15:11:20 +08:00
Zhihuan He bc45a18269 drivers: ram: rockchip: rk3308: coding style 
Change-Id: Icf1bb1d8ca588b244eb7b736d0e033013d023851
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
 2020-12-23 18:13:34 +08:00
Guochun Huang e9b1001b3c video/drm: dsi: add rk3568 support 
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: I8cef8db74dcc9e05f4c0b2511c728838a0d92cb7
 2020-12-23 15:48:38 +08:00
Andy Yan d040854345 drm/rockchip: Add support for vop2 
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I52af209b3a9b85692d0589e1653160d284f4ba9c
 2020-12-23 15:48:38 +08:00
Sandy Huang cdb300bd81 video/drm: display: add compatible rk356x dtsi config 
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I9ef1d7ad2bfaa84b90482208421e8b7a76d051ff
 2020-12-23 15:48:38 +08:00
Jason Zhu 98637248d5 clk: rockchip: rk3568: fix print error log 
The log is "Fail to set the ACLK_BUS clock"

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Ie22e5139e1446ae751d1e64729c7a0b4cdbac69e
 2020-12-22 12:10:45 +08:00
Tang Yun ping de9242dcd7 drivers: ram: sdram_common: add 4rank support for rk3568 
Change-Id: I179ff4ef1f07a881f76ac086c4ab330e3ff82d73
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
 2020-12-21 16:42:01 +08:00
Shunqing Chen b327b5399a drm/rockchip: dw-hdmi: set HDMI/DVI mode 
If sink is hdmi, but not set to hdmi mode,
will cause no sound after entering Android.

Signed-off-by: Shunqing Chen <csq@rock-chips.com>
Change-Id: I5a8cc308c8064e0c372162145b1e814765e80630
 2020-12-21 11:52:22 +08:00
Joseph Chen bc5b1ed874 Revert "rockchip: rk3568: remove TPL code" 
This reverts commit d77dbb6e1c.

Reason: if we remove TPL code, there will be different compile
path for SPL to initial platform, which takes some unknonw issue
in kernel. So let's bring back TPL.

Change-Id: Iee1ab45d0a622425b616b22f8fbcdb7b28f057f7
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
 2020-12-19 17:11:36 +08:00
Joseph Chen d77dbb6e1c rockchip: rk3568: remove TPL code 
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I4b7d7f830d7cc9a5d6623f2add9a4755ce833f2c
 2020-12-18 18:03:01 +08:00
Joseph Chen e6b2bd8785 irq: irq-gpio-switch: correct usage of strstr() 
Fix gpio interrupt register with wrong gpio bank.

(Fixes: 8db677370c irq: irq-gpio-switch: add gpio alias name support)

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ia60e55a134cfab19ed015796486417e0699bd087
 2020-12-18 18:02:39 +08:00
Shunqing Chen 3c3ec66903 fuel gauge: rk817/rk809: fix get rsoc error 
Signed-off-by: Shunqing Chen <csq@rock-chips.com>
Change-Id: Id946d56c9aafef87bb864218155e1b2353991140
 2020-12-18 14:43:48 +08:00
Wenping Zhang e79e208579 video/rk_eink: fix screen display stripes after WF_TYPE_RESET update. 
Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
Change-Id: Id406c1103a0deea3e3ab9abcb8664e1ccc098520
 2020-12-16 06:53:58 +00:00
Guochun Huang c3a1ac4926 video/drm: inno_mipi_phy: Add support for rk3568 
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: Ie6e5810ad3614e28a540b3bbfc071cf36362da79
 2020-12-15 17:41:28 +08:00
Joseph Chen 094465a906 power: charge animation: disable timer while uninit timer 
Otherwise the time is still working in kernel if there is no
one to update it, which always wakeups system suspend.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ic2291b26730557c50fb8cbd505d05b40bb582c74
 2020-12-15 17:38:48 +08:00
Zorro Liu cd44409e4e drivers: video: rk_eink: update cmdline vcom parameter 
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
Change-Id: I80ac52356380bf4194d7115036634ffae35d21ce
 2020-12-15 16:19:53 +08:00
Jason Zhu cf432719d2 misc: rockchip-otp: support rk3568 
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I21be09b06f7ac3a0f75e47e59ec094d6e254d05d
 2020-12-15 16:19:19 +08:00
Jon Lin 4bf17e940b mtd: mtd_blk: Support mtd_dwrite in spl 
Change-Id: I495ca5498fae9f03f6042cb074c9c8c3f590eea5
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2020-12-13 19:25:20 +08:00
Jon Lin 8ff9c29cc8 mtd: spinor: Add more mtd information 
1.erasesize_shift, erasesize_mask
2.it's useful for mtd_blk.c

Change-Id: I0bd184fc86637849fbd079f9f539387465a07b8f
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2020-12-13 18:00:31 +08:00
Wenping Zhang 255e57518a power: charge animation: add eink charging display. 
Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
Change-Id: Id9d84a27ae2bbc8746e99ed01a96c53e2335a2b6
 2020-12-10 17:51:14 +08:00
Wenping Zhang 93a7515a89 video/rk_eink: add rockchip eink support. 
Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
Change-Id: I39e92ee00690ea1be274b1abd94d54284ef36898
 2020-12-10 17:51:14 +08:00
Elaine Zhang 0a04fb5062 clk: rockchip: rk3568: support rkvdec clk setting 
Change-Id: Ic63b3c8ecbefcdf551d646ebb40521e6b521610b
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
 2020-12-10 15:26:42 +08:00
Jon Lin a792c7e0c5 mtd: spinand: Support new devices 
HYF1GQ4UDACAE, HYF4GQ4UAACBE

Change-Id: I7abcc925ccdf8be5507a8b584b58c6b03a78962c
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2020-12-09 19:27:55 +08:00
Jon Lin 4cab706e7f mtd: spinand: Support new devices 
FM25S01

Change-Id: I1c7eab8799b0a381b7fa32584e608c3a115d83e6
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2020-12-09 19:27:48 +08:00
Jon Lin 0659623d62 mtd: spinand: Support new devices 
FS35ND02G-S3Y2, FS35ND04G-S2Y2

Change-Id: Idc74c823fc707ba4dbeac359c4f6ca0a7e3ee778
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2020-12-09 19:27:34 +08:00
Jon Lin ad6355f7d7 mtd: spinand: Support new devices 
XT26G01C

Change-Id: If7147ebd12a993de86b335824d8c6e9d8ea06d52
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2020-12-09 16:00:38 +08:00
Jon Lin 266cba03bb mtd: spinand: Supoprt new devices 
TC58CVG2S0HRAIJ

Change-Id: I4412a9208fe8f22053dbb74d1cb362b19e13a18a
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2020-12-09 15:07:38 +08:00
Jon Lin 55efc32aea mtd: spinand: Supoprt new MXIC devices 
MX35UF1GE4AC, MX35UF2GE4AC

Change-Id: I064e9116c565e2ea3b92432e9c68864d47a7567c
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2020-12-09 14:57:38 +08:00
Jon Lin 5fe488ff12 mtd: spinand: Support new devices 
HYF2GQ4UAACAE, HYF2GQ4UHCCAE

Change-Id: I1b36ca507984d2794375a6c1bce409d749495c62
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2020-12-09 14:53:06 +08:00
Jason Zhu 990fd51c55 misc: rockchip-otp: extract the difference in each chips 
We use function spl_rockchip_otp_start & spl_rockchip_otp_stop to
realize the different of each chip's otps, such as mask area and
secure config.

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I3b5d0377d78e5c2ed6e8ed52a89cadefc4994be1
 2020-12-08 17:37:39 +08:00
Shunqing Chen 3b02c9fe3a power: fg_cw201x: replace fdt functions 
Signed-off-by: Shunqing Chen <csq@rock-chips.com>
Change-Id: Id03c367e619444f5f76ecbb36f831e09959d2888
 2020-12-07 02:34:36 +00:00
Jason Zhu 77e56285c1 clk: rockchip: rk3568: support set sdmmc0 clock 
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Ic7bdfce9a9551649e053f58b6d9219e73e6afed5
 2020-12-07 09:24:24 +08:00
zhangqing f6d2779458 clk: rockchip: rk3568: support more clk setting 
support cpll_xxx settings.

Change-Id: I2735f6abe0fb02828b7ace76b58a60757199cab8
Signed-off-by: zhangqing <zhangqing@rock-chips.com>
 2020-12-07 09:22:55 +08:00
Jason Zhu d62fa58224 mmc: sdhci: rockchip: reset the clock phase 
Reset the clock phase when the frequency is lower than 52MHz.

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I49c50779ab5e1103d815cd2be1a7c9603cea397a
 2020-12-07 09:20:43 +08:00
Jon Lin 3c70338210 rkflash: Support new spinor 
1.Support XT25F256BSFIGU, P25Q32SH-SSH-IT
2.Fix PUYA devices property

Change-Id: I6c5ff381770508962f8ed16189d03385f511d84f
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2020-12-07 09:19:54 +08:00
Jon Lin a097a4fc3a rkflash: Support spinor prog_addr_lines 
Convenient for spinor detection

Change-Id: Id9e09de26ffa978f18a97d8f0555c70ee0baa22c
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2020-12-07 09:19:54 +08:00
Jon Lin 49eba1a38a rkflash: Support sfc DLL api 
Change-Id: Ibe8cd0d1e72e8dc871466dcb1014e6817b184e80
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2020-12-07 09:19:54 +08:00
Yifeng Zhao b3621a1078 spl: zftl: fix L04A and L05B boot fail issue 
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Icdc93ce7d8948c3c12f28aef08c98df4b3aa3166
 2020-12-03 15:08:50 +08:00
Yifeng Zhao 84dc46da6a drivers: rknand: update nand flash drivers 
1. support samsung 14nm 8GB NAND FLASH.
2. support ymtc 64L 32GB NAND FLASH.
3. support toshiba 15nm 8GB NAND FLASH.
4. support rk3568

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I01c9eb698c1ae829e6a2858c2664d62cf0851ab7
 2020-11-30 10:03:05 +08:00
Yifeng Zhao e18e709024 drivers: rknand: add nand flash drivers for spl 
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I21c449226f57f2ff05fdcf241dde014062634cb5
 2020-11-27 20:06:23 +08:00
Joseph Chen d7965d03e2 pinctrl: rockchip: add SPL support 
CONFIG_OF_LIVE is always available in SPL and U-Boot.

Use CONFIG_IS_ENABLED(OF_LIVE) to unwind as CONFIG_OF_LIVE
in U-Boot and CONFIG_SPL_OF_LIVE in SPL.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I980579d54850ca7655b464688ba9e6bd35f24250
 2020-11-27 14:05:18 +08:00
Shunqing Chen 038c1ecaa2 power: charge animation: energy enough auto exit uboot charge 
Change-Id: Ifa94783869c7cb35f819f3700c82bac7d00a7b05
Signed-off-by: Shunqing Chen <csq@rock-chips.com>
 2020-11-26 15:23:46 +08:00
Shunqing Chen 00d11ef213 pmic: rk8xx: support power key config from dts 
Signed-off-by: Shunqing Chen <csq@rock-chips.com>
Change-Id: I4b2def4e5b171b2b46f26695e9cabec8a7b496e2
 2020-11-26 11:51:28 +08:00
Jon Lin e336ce4ee5 mtd: spinand: Add foresee devices 
Change-Id: I115ea19030edc2e83e877621f055555b481f98db
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2020-11-26 09:10:57 +08:00
Jason Zhu 65bd598f41 clk: rockchip: rk3568: set the ACLK_BUS to 150MHz in spl 
Since the mcu uses the ACLK_BUS clock and 150MHz is need as
default clock rate.

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I60c4603fa0c0b45667c6583992ea461fed18fcf5
 2020-11-24 17:13:18 +08:00
Lin Jinhan 00fa57d80d driver: crypto: mask CRYPTO_SYNC_LOCKSTEP_INT_ST flag 
This flag maybe abnormal trigger.

Change-Id: Id398d1e8636c28b8cc42d950cafa5e2731a41b62
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
 2020-11-24 16:02:35 +08:00
Lin Jinhan 7eea182341 crypto: rockchip: support rk3568 without hwrng in crypto 
Change-Id: I557a05e0336fe6b80d903a48a2d088f165a4eeca
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
 2020-11-24 16:02:35 +08:00
David Wu 7ef28ab639 i2c: rockchip: Clean ipd status if i2c transfer error 
If there was an i2c transfer error like iomux error,
should clean the ipd status, it might cause kernel i2c
irq error handing.

[    0.690749] rk3x-i2c fdd40000.i2c: irq in STATE_IDLE, ipd = 0x10

Change-Id: Ia127edada535288e9b984d6dc0dff813e6152eff
Signed-off-by: David Wu <david.wu@rock-chips.com>
 2020-11-24 14:43:46 +08:00
Jon Lin 22edf95882 mtd: spinand: Support W25N02KV 
Change-Id: Iaf4a50ce7bb0bb9978a05d339a34763445c09c84
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2020-11-20 20:54:39 +08:00
Jon Lin b833c879cf rkflash: Support new spi flash 
1.Support W25N02KVZEIR
2.Support GD25B512MEYIG, MX25U51245G

Change-Id: Ia0181aa3fc6cbf17e2b0abd43dea80b5d9848d88
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2020-11-20 20:31:21 +08:00
Jianqun Xu dbff1ed621 gpio: rockchip: get gpio bank from pinctrl device 
Change-Id: I0dd2bc1b61bfdfe8edfd79b3a794522499eaae5c
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
 2020-11-19 14:50:05 +08:00
Jianqun Xu e9c98b3baf gpio: rockchip: fix get gpio mux operation error return 
Change-Id: Ia225ae3acea2d2d2347870b3d6a20c4a7d22e7e9
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
 2020-11-19 14:50:05 +08:00
Jianqun Xu 8273b391c5 pinctrl: rockchip: a pin unrouted is invalid 
Change-Id: I706b23277f33768fc7c8bcfd06e6417fe3e8a0db
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
 2020-11-19 14:50:05 +08:00
Elaine Zhang fdd74c3220 clk: rockchip: rk3568: support ebc clk setting/getting rate 
Change-Id: Iecac8e56b2b5615b54c8969767053b6282fe6fb8
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
 2020-11-19 14:48:18 +08:00
Jason Zhu 661bcdfeff mtd: mtd_blk: add mtd_blk_map_fit() to create map for fit image 
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I0d0195f455ee9afb32676510fc077fe63ae5c7ad
 2020-11-18 16:10:55 +08:00
Zhihuan He 379e9cabde drivers: ram: rk3308: add sdram_rk3308.c build 
Change-Id: I43079e6709d6eeb691eb73786bba7920c081b9c9
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
 2020-11-17 20:56:28 +08:00
Finley Xiao b85730d9e9 clk: rockchip: rv1126: Fix mask bits for gmac src clks 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I7f81a3e7586dcb85511502d3a329ac1cba7ccc8a
 2020-11-17 14:46:27 +08:00
Zhihuan He 8ec8d58eeb drivers: ram: rockchip: add rk3308 sdram driver 
Change-Id: I96160af2095ba21b440c6d3789349d8cbc4fea75
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
 2020-11-16 20:40:52 +08:00
Zhihuan He b86c816ccb drivers: ram: rockchip: rv1108: clean up the code 
Change-Id: I3446805fd9c320ddd49b9cb12df82943057ed9ee
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
 2020-11-16 20:39:39 +08:00
Ren Jianing 7329ce5782 phy: rockchip-inno-usb2: fix some issues for rk3568 usb2 phy 
This patch fixes the following issues for rk3568 usb2 phy.

1. Set utmi opmode to normal mode for rk3568 usb phy when usb
phy enter suspend mode via usb phy grf. It can help to avoid
the DM/DP floating and the line state be detected as 2'b11.

2. Fix the offset of INT_STATUS_CLR. It can help to avoid
triggering the linestate irq constantly.

Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
Change-Id: Ic108e116d1473341b61743ec4244bc034a95f501
 2020-11-16 15:59:44 +08:00