c571b46d59
ARM: rockchip: rk1808 set gpio0_C2 to pull down
...
It's a long story to explain why to set gpio0_c2 to pull down, start
from ...
The rk1808 suspend supports to swith 32k clock source, BUT need the
low level for each source clock.
clk_32k --- ext_32k from pmic for example (pin on SoC is AWK13)
|
--- int_32k divided from 24MHz
The pin AWK13 default to be GPIO0_C2 which is normal state defaultly.
When the software try to switch clk_32k from int_32k to ext_32k, but
the pin is in normal state, unluckly for some board it's high level,
the result is the switch never be done, till device try to do suspend
and into a halt state.
Make the gpio0_c2 to be pull down as default state for kernel.
Change-Id: I6ae5859352d9a680166b4c711e25491a60442209
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-12-28 14:51:09 +08:00
a432abd525
rockchip: rk1808: fix typo
...
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I117c754994afc73a1c57274593ddc216273344d8
2020-12-28 14:47:57 +08:00
bf39446f5d
rockchip: spl: support rollback index
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Support rollback index when enable CONFIG_SPL_ROCKCHIP_SECURE_OTP.
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Id865d9b13f92a322b576dd0168805e05acbdbcbf
2020-12-28 14:13:01 +08:00
a31e24f37f
rockchip: fit_misc: use OTP_SECURE_BOOT_ENABLE_ADDR to get vboot address
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Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I464f6834d3ec2cb653e5149ab2f9abd3bbcc1724
2020-12-28 14:11:57 +08:00
2bff5c680e
clk: rockchip: rv1126: Only change APLL rate to 1008MHz for tb
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fixes: (c1bad47
2020-12-24 15:06:36 +08:00
3a5404aff4
clk: rockchip: rk3568: set the APLL_HZ to 816MHz
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Set the APLL_HZ to lower frequency in spl when the pmic is not
available.
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Id540ff174ef93c3d9ea22bb37dc26ca7b587a5b7
2020-12-24 10:00:10 +08:00
355cdcf345
rockchip: rk3308: coding style
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Change-Id: If0404baf3019317e2dcf9a6c8a77e8a82a13f888
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
2020-12-23 18:13:34 +08:00
2cde40a19f
arm: board: Random way to change multiple mac addresses
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Change-Id: I11f93717fae567daaba4801979fb38c74e7b4e83
Signed-off-by: David Wu <david.wu@rock-chips.com>
2020-12-23 15:31:13 +08:00
3c13acb0a2
rockchip: sdram_msch: update noc define for rv1126
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Change-Id: Ic545cacffabc0c726d6d0de3e6d72a3e6c971849
Signed-off-by: YouMin Chen <cym@rock-chips.com>
2020-12-21 16:47:27 +08:00
5290223f29
rockchip: sdram: add define for lpddr4x
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Change-Id: Ic7cd740e3498e47ad48376784ca0855d633baf65
Signed-off-by: YouMin Chen <cym@rock-chips.com>
2020-12-21 16:42:02 +08:00
de9242dcd7
drivers: ram: sdram_common: add 4rank support for rk3568
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Change-Id: I179ff4ef1f07a881f76ac086c4ab330e3ff82d73
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
2020-12-21 16:42:01 +08:00
600d0322ca
driver: ram: rockchip: update sdram_pctl_px30.h
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1)add ecc define
2)fix some define error
Change-Id: I7a5302c320850c2dc579036841b4b0aebd12e03e
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
2020-12-21 16:42:01 +08:00
bc5b1ed874
Revert "rockchip: rk3568: remove TPL code"
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This reverts commit d77dbb6e1c
2020-12-19 17:11:36 +08:00
d77dbb6e1c
rockchip: rk3568: remove TPL code
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I4b7d7f830d7cc9a5d6623f2add9a4755ce833f2c
2020-12-18 18:03:01 +08:00
559b4bfa7c
UPSTREAM: arm: arm64 32bit address relocation
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Current relocation code is limited to 21bit PC-relative addressing
which might not be enough for bigger code sizes. The following patch
increases the addressing to 32bit PC-relative. This feature is
specially interesting if U-Boot is build without optimiation (-O0) as
the text section is increased significativelly.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Ib54540ff040642588b4bfe2d030e5d9eabf8348c
2020-12-18 15:13:24 +08:00
d107cc5697
rockchip: make_fit_atf: correct sign-images for standalone
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Fixes:
(ab011df20d
2020-12-17 18:33:39 +08:00
ed474e7a97
rockchip: make_fit_atf/optee: add platform name
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It's better to add platform name for the uboot.img.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I050981356d68ac1816ebd2cdc8c0cc69bfd841bd
2020-12-17 17:35:35 +08:00
ab011df20d
rockchip: make_fit_atf: support pack mcu.bin
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I80e158050e1af1cd1c3c44669fab87402397cc09
2020-12-17 15:18:20 +08:00
ab1a0b8da2
rockchip: dts: rk3568: add secure_otp node
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Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I67af428fbd0ae016b25a6aafc8c28d36e055d765
2020-12-15 16:19:19 +08:00
b341628592
rockchip: dts: px30: correct the secure_otp's compatible
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Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I77080f8cb05571b9ac6501a3226a680de0d3c35c
2020-12-11 15:19:47 +08:00
26cf79001d
rockchip: rk3568: rkvdec set clk 400MHZ
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Change-Id: I3b154200fd81dab82a3c4956adf99437a51f88f9
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
2020-12-11 15:16:03 +08:00
efeef7e54d
rockchip: board: add logo display for eink screen.
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Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
Change-Id: If2115b257b6928c4a24afad09c04943bdd72893e
2020-12-10 17:51:14 +08:00
d4b31d1047
Revert "rockchip: make_fit_optee/atf: add "burn-key-hash = <0>"."
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This reverts commit 34b05be1cb
2020-12-10 15:40:26 +08:00
bf8034353d
rockchip: rk3568: fixup cru node frequency
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Support 25M\50M Gmac clk.
Fixes: d83e3037ee
2020-12-10 15:26:42 +08:00
0a04fb5062
clk: rockchip: rk3568: support rkvdec clk setting
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Change-Id: Ic63b3c8ecbefcdf551d646ebb40521e6b521610b
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-12-10 15:26:42 +08:00
ae17d6d435
rockchip: dts: px30: add secure_otp node
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Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I65956e2386f1bb8c9f9594547f0135837a132b7f
2020-12-09 14:57:25 +08:00
d83e3037ee
rockchip: rk3568: fixup cru node for legacy variant chip
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Implement weak function: rk_board_fdt_fixup().
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Id8ef49959220b145bb9219e456a3ae00cbb6bb13
2020-12-08 14:48:06 +08:00
a230447799
rockchip: dts: rk3568: support bring-up from sdmmc0
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Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I4c36e2968f4a82e64f8583ce20270edffd9c50e3
2020-12-07 09:24:24 +08:00
d6af9bf824
rockchip: rk3568: set sdmmc0 to secure
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Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I8fbbc79e6e72dac688f0b46b2f961e97e80b7383
2020-12-07 09:24:24 +08:00
f6d2779458
clk: rockchip: rk3568: support more clk setting
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support cpll_xxx settings.
Change-Id: I2735f6abe0fb02828b7ace76b58a60757199cab8
Signed-off-by: zhangqing <zhangqing@rock-chips.com>
2020-12-07 09:22:55 +08:00
2e32f6669c
rockchip: board: Support more mac address
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The RK3568 has two gmac, but only support one mac address right now,
define the more ethernet mac address at vendor storage to support it.
We also write random address back to vendor storage, so that we can
not generate random address every time.
Change-Id: I2aba82c4af70d9dfdfdbc5d7e776d8100ae2fda9
Signed-off-by: David Wu <david.wu@rock-chips.com>
2020-12-03 16:47:01 +08:00
32b04d78e7
rockchip: rk3568: Modify fspi pins property
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Change-Id: Icc50a2087cde8a716b306e90ba4c3793883e684c
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-12-02 13:02:33 +08:00
91fb3e0a6b
rockchip: dts: rv1126: add sdmmc pinctrl node
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Add sdmmc pinctrl node so that the sdmmc io can be set when in
sd-boot process. And delete some unused pinctrl node such as
sfc and nandc.
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I675262800dbfaeaf9beb9f7f1724faa6688bbf92
2020-11-30 15:10:50 +08:00
5d96bba97e
rk3568: add nand support for spl and uboot
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Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I3b849db025ae15dde22636ae17ac2d19c5484dd6
2020-11-30 09:53:23 +08:00
568252a02c
rockchip: spl-boot-order: support scan rknand device
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Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I49da396e3e8d10572be9b9f9dac57bd317c4cf83
2020-11-30 09:53:23 +08:00
ffc357038c
spl: support boot from rknand device
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Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I168ec42ec1ac4bc1e8b640fba22357cde4a26aac
2020-11-30 09:53:12 +08:00
34b05be1cb
rockchip: make_fit_optee/atf: add "burn-key-hash = <0>".
...
It is available when verified boot is enabled, to active
this feature: ./make.sh ... --burn-key-hash
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I2224bae079f12d48609989b080b287dfe4fd2cb3
2020-11-26 14:44:34 +08:00
0838e4e69d
rockchip: rv1126: Fix ram boot fail
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The OTP_S access is not allowed from the non-secure world.
so, remove it for ramboot which have already done in trust.
ram boot flow:
usb boot -> trust/op-tee -> uboot -> kernel -> rootfs
normal boot flow:
spl boot -> trust/op-tee -> uboot -> kernel -> rootfs
Fixes: 1ac424cf03
2020-11-25 15:35:28 +08:00
94d677da26
rockchip: dts: rk3568: add and enable crypto node
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Change-Id: I1ca3dc64c23663a5b30fc369f287f391d17ca3f3
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2020-11-24 16:02:35 +08:00
757632eec4
rockchip: rk3568: enable GICV3
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I98e121cf4300631c04793c73e7af3bef1f1009d9
2020-11-23 14:21:15 +08:00
2c36608a71
rockchip: rk3568: init core pvtpll ring length
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Change-Id: I2a7957ce1c2b38dec984c6b4f36392f92c185190
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-11-21 11:29:33 +08:00
666b2d1f24
rockchip: boot-mode: clean up rockchip_get_boot_mode()
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I4a11fa846a8fd74ecffe1ee0ac46ebdeaa2413a7
2020-11-20 21:17:34 +08:00
ea8b124a0e
rockchip: boot-mode: fix lost boot-mode from register
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PH and PL is from boot mode register, reading once.
PM is from misc.img and should be updated if BCB offset is changed.
Return the boot mode according to priority: PH > PM > PL.
Fixes:
(3aaa96e8af
2020-11-20 21:17:34 +08:00
2d25c32e07
rockchip: dts: rk3568: Resync from kernel-4.19
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Resync from kernel-4.19:
(2f153f1fa73c arm64: dts: rockchip: rk3568: add thermal-zone for pvtm)
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I36fdfc366f4d44f3226b6f8b35ee496701fe021e
2020-11-19 15:34:01 +08:00
fdd74c3220
clk: rockchip: rk3568: support ebc clk setting/getting rate
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Change-Id: Iecac8e56b2b5615b54c8969767053b6282fe6fb8
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-11-19 14:48:18 +08:00
d181efcb77
rockchip: rk3568: delete useless code
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Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Idf90798700f1128d275d0311ed50ed531acaa42c
2020-11-18 17:26:20 +08:00
379e9cabde
drivers: ram: rk3308: add sdram_rk3308.c build
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Change-Id: I43079e6709d6eeb691eb73786bba7920c081b9c9
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
2020-11-17 20:56:28 +08:00
046cd38054
rockchip: rk3568: disable eDP phy to save power
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Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I4b94c5c28196f72c9d41efe7bdb9eb837eb6adf4
2020-11-17 19:51:52 +08:00
b85730d9e9
clk: rockchip: rv1126: Fix mask bits for gmac src clks
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Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I7f81a3e7586dcb85511502d3a329ac1cba7ccc8a
2020-11-17 14:46:27 +08:00
08d283a46e
rockchip: dts: rk3568: disable usb2 host by default
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If we enable usb2phy1 with dm-pre-reloc in uboot and disable it
in kernel, the status of usb2phy1 will be "okay" and usb2phy1
node will be put ahead of usb2phy0 which leads to vbus detect
fail.
Here is the error log:
get syscon usbgrf failed
rockchip_chg_get_type: get u2phy node failed: -19
Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
Change-Id: I16c1ddd42bf1a2e7a98fc9cdf1509a62714c8b6b
2020-11-17 14:45:08 +08:00
0934588e54
rockchip: rk3568: support bring-up the mcu
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Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Ib992d4ebe078d8d8752f72c8a9824e85b5f24da2
2020-11-17 10:58:45 +08:00
bb82cbf82d
rockchip: rv1126: hold a few time for mcu to capture the boot address
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Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: If30b429577e715d2851eaab1c0fa6a84f0ad8850
2020-11-17 10:20:15 +08:00
8ec8d58eeb
drivers: ram: rockchip: add rk3308 sdram driver
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Change-Id: I96160af2095ba21b440c6d3789349d8cbc4fea75
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
2020-11-16 20:40:52 +08:00
b86c816ccb
drivers: ram: rockchip: rv1108: clean up the code
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Change-Id: I3446805fd9c320ddd49b9cb12df82943057ed9ee
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
2020-11-16 20:39:39 +08:00
ad11931911
rockchip: tpl: add arch_cpu_init()
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The arch_cpu_init() should be called for cpu early init
for tpl.
Change-Id: I3aad0f284089d8523710a2d24daab44995fa148d
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
2020-11-16 20:39:39 +08:00
aa8e825b4b
rockchip: rename fit.c => fit_misc.c
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I8afc870973d75f5e0e3bc968eaf6966f1696ac77
2020-11-14 08:35:40 +00:00
a14492767c
rockchip: make_fit_atf/optee.sh: add "kernel-fdt" node
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kernel FDT is for U-Boot if there is not valid one from images,
ie: resource.img, boot.img or recovery.img. It is put right
after U-Boot FDT.
This is used for U-disk bing up.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Iab1ddbbf3978a6b2fc08316bb136c43c0d2eef60
2020-11-14 15:32:03 +08:00
20647277f1
rockchip: kernel-dtb: check mismatch of kernel dtb
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Simply check cru node to verify if this kernel dtb
is belong to current platform.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I8c0b2181a2ca3cada72a9e18788de0bfdc9ba3c5
2020-11-14 15:32:03 +08:00
7d70ffaead
rockchip: make_fit_atf.sh: use "-" instead of "@"
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I02b6a5f376184ea50c0db8714d225a1cd0cb39e1
2020-11-14 15:25:33 +08:00
cce972667a
rockchip: rk3568: set the emmc drive strength to level 2
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Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Ic515e9aa81448ac1abcf378e9f4cd9b08247bdde
2020-11-14 11:55:39 +08:00
9f408268dc
rockchip: rk3568: support rockchip_get_cru for rk3568
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Change-Id: I2029c26da80b5ed5cd18e154751688fd29862813
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-11-12 10:32:25 +08:00
b48cb5c290
rockchip: dts: rk3568: set emmc bus width to 8
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Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Ifdbe8ed76caa746070c3c5cf166573ffeb8d9645
2020-11-11 15:04:39 +08:00
1ac424cf03
rockchip: rv1126: Increase otp tRWH timing for stable read
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Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I42d57e6a9eaeb30e24b755821c7672ea9ffce56d
2020-11-11 10:17:09 +08:00
88bba81c6c
rockchip: dts: rk3568: Enable spi flash
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Change-Id: I36eb3471eb82e78db1bdd7114ce2bc30166e0e68
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-11-10 14:58:34 +08:00
3aaa96e8af
rockchip: boot-mode: reinitialize static variable "boot_mode"
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Special handle:
Once the BCB offset changes, reinitialize "boot_mode".
Background:
1. there are two Android BCB at the 0x00 and 0x20 offset in
misc.img to compatible legacy(0x20) SDK.
2. android_bcb_msg_sector_offset() is for android image:
return 0x20 if image version < 10, otherwise 0x00.
3. If not android image, BCB at 0x20 is the valid one.
U-Boot can support booting both FIT & Android image, if FIT
boot flow enters here early than Android, the "boot_mode" is
set as BOOT_MODE_RECOVERY according to BCB at 0x20 offset.
After that, this function always return static variable "boot_mode"
as BOOT_MODE_RECOVERY even android(>=10) boot flow enter here.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I0ed05ba1b18447a58d3faff37ac50ecc79fab374
2020-11-09 17:20:54 +08:00
311b34e2f1
dts: enable hs200 mode for rk3568
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Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Ia6108713cf09372b35bbc0ae35ca179358a83362
2020-11-09 16:10:02 +08:00
d982a3cdf9
rockchip: chip info: add rk3568 support
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I08e347709d870c5c65265a31ccfb1ccd370ef606
2020-11-08 21:22:37 +08:00
ee4d695f5e
rockchip: make_fit_atf/optee: add "arch" property for fdt node
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I129f2cc7a395d48c83e5ab01fb12b73eda614ed3
2020-11-08 20:40:58 +08:00
81e837fa84
rockchip: spl: support pre-loader serial
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I082fae758a1e9dfb2b4c8b241b24bee396704922
2020-11-07 20:49:49 +08:00
3f04f6e376
rockchip: rk3568: fix compile error
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error: ‘CRU_SOFTRST_CON02’ undeclared (first use in this function)
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I64935d50646a1ca7d228308c11f2f95a2e2378bb
2020-11-05 16:17:08 +08:00
8ae3c2c283
rockchip: rk3568: set the emmc to secure
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Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I415879f184b35352bb5a53afc40100242cbeaf33
2020-11-05 15:22:21 +08:00
b3a7cb38db
rockchip: rk3568: support spl_fit_standalone_release()
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Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Id61a82729074348f1879b32248f6640025773db6
2020-11-05 15:22:21 +08:00
7b5df4cdfb
rockchip: rk3568: enable TPL and select TPL_TINY_FRAMEWORK
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Change-Id: I488915ecfea6d073b5a812418987da847f747d4e
Signed-off-by: YouMin Chen <cym@rock-chips.com>
2020-11-03 10:54:39 +08:00
25858e7590
rockchip: rk3568: configure UART iomux in board_debug_uart_init
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Change-Id: I02dca611a7b15dc0161dc5e65a367b038645dd9a
Signed-off-by: YouMin Chen <cym@rock-chips.com>
2020-11-03 10:54:08 +08:00
248bf3b22d
rockchip: rk3568: not need syscon_rk3568.c when build TPL_TINY_FRAMEWORK
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Change-Id: I8f9aaa04dbf225fe0e5848071359cb55033cef10
Signed-off-by: YouMin Chen <cym@rock-chips.com>
2020-11-03 10:14:51 +08:00
034db99592
dm: serial: support always use uart debug mode
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In this mode, uart debug is initialized depends on
configuration from pre-loader or CONFIG_UART_DEBUG_.
The serial is not care about dts "stdout-path" and
not register into console framework any more. It's
nice to use pre-loader serial and make serial easy
to configure.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: If4c68229d76b6f1710a35e3ef9a2a91cb306fa9c
2020-11-02 18:34:22 +08:00
93586e70e1
rockchip: board/spl: implement board_init_f_boot_flags()
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I6510f53c1a2713358ba6b5a40485c9e1aeee98dc
2020-11-02 18:34:22 +08:00
e6b325265d
rockchip: dts: rk3568: update configure
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I48744f026ec967ab1053cb14041bade833121028
2020-11-02 18:34:21 +08:00
9e8632b722
rockchip: rk3568: select board late init
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I439694cd01c0d2c8fef8e84b0321dd1cbdd0150c
2020-11-02 18:34:21 +08:00
ff0e8415ac
rockchip: rk3568: add <asm/io.h> head file include
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Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
Change-Id: Iadb23cf053e21983d89361e0fb81f16ca7bb129c
2020-11-02 18:18:02 +08:00
782f7efb2c
rockchip: dts: rk3568: add usb support
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Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
Change-Id: I4acec12353ba525873ba6771ced9e83305ef4874
2020-11-02 18:17:36 +08:00
424749024a
rockchip: dts: rk3568: add usb2 phy nodes
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Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
Change-Id: Ib0815580ed2a851598800ac5ef235b313143c00f
2020-11-02 17:14:37 +08:00
66d0591041
rockchip: add fpga ram/mmc support
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I4ff84dc3a2072b7f9c31405d45394538ce3f73f6
2020-10-29 15:21:42 +08:00
811f8a32ef
rockchip: make_fit_boot: support generate arm64 boot.img
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ic21f0f642aed40bc005048be2fe898af88ccf023
2020-10-28 21:23:07 +08:00
71be53464f
rockchip: rk3568: open or gate clocks automatically when perform idle
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Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ifb57c2f04d75a0ca925d96c423784678a609ce46
2020-10-27 14:53:56 +08:00
b50fa2962f
rockchip: dts: rk3568: Add flash devices to sfc node
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Change-Id: Icf0f4ac350dca388e91a6bf443c72422c4b95dd0
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-10-26 16:25:18 +08:00
cf85037cdc
rockchip: dts: rk3568: Add sfc node
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Change-Id: Id9df11a15d16dcf39b5415674224431d277bd8e4
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-10-26 16:25:18 +08:00
767626d1ad
rockchip: make_fit_atf.sh: fix typo
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I15230673c8a1de36dcf5105a73f8a3335e3921e8
2020-10-23 17:34:01 +08:00
d3cb8b064e
rockchip: board: Add support for cpu-id parsed from otp
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Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I27350a847dd13cc7d1eb0cad481adccfead23bce
2020-10-23 15:06:11 +08:00
7e26af3867
rockchip: add rk3568 SoC support
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I2e163b93d4ec5a60f1ff9c589626d3ccd994f854
2020-10-22 19:39:19 +08:00
be7064f8f7
rockchip: dts: rk3568: add basic dtsi/dts
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Sync from kernel-4.19:
(85abcd6 phy: phy-rockchip-snps-pcie3: Initial support)
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I474a6f5bfdaf5f78655a121ac9dc08e3708de226
2020-10-22 19:39:19 +08:00
417bebc456
clk: rockchip: rk3568: Add clock driver
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Add basic clock for rk3568 which including cpu, bus, mmc,
i2c, pwm, gmac ...clocks init.
Change-Id: I4119f10897d06befa4a39198b3724dc515d416e3
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-10-22 19:39:19 +08:00
3db2d9fdeb
rockchip: weak: support soft gunzip image
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I645627b9e6c1e027be9532f25f3da7bc1e7b6928
2020-10-22 16:37:49 +08:00
392231a732
rockchip: add make_fit_atf.sh for armv8 to generate u-boot.itb
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Add support:
- decode bl31.elf to binary;
- include tee.bin dynamically;
- none or gzip compression;
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I483cb81b6ab05a89fd0df3a2a7d95e6ff3ad6636
2020-10-22 16:37:49 +08:00
9e84e21cf4
configs: rv1126: use make_fit_optee.sh as fit generator
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I31237cbcefcd62a0abbe7a549f46ad41f646ac55
2020-10-22 16:37:49 +08:00
65a17145ae
rockchip: make_fit_optee.sh: sync from rv1126_make_fit.sh
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Iaa3dc834b9e49e025d9feed1c03965ef2f1a4f35
2020-10-22 16:37:49 +08:00
c45a6d11b5
rockchip: rv1126: fit: clean coding style
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ibfba9e70d3d5bcae8bd6850ab546edc736f56ba4
2020-10-22 16:37:49 +08:00
a9c93f9d80
rockchip: make_fit_args: support make u-boot.itb command
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The command pass board dtb as arg1.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ie96ad09665698904978caca82ec38843930ed09e
2020-10-22 16:37:49 +08:00
45dfd9925e
rockchip: make_fit_atf.py: remove '@1' of nodes
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I9a398826213dd66df58aeac985146997e085f7d1
2020-10-22 16:37:49 +08:00
ea89190d3a
rockchip: vendor: Deinit bootdev_type if initial process fail
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Change-Id: I1da43b5e576bfc3410c30794986975f2cb0ee092
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-10-13 19:30:07 +08:00
Jianqun Xu
Jason Zhu
Finley Xiao
Zhihuan He
David Wu
YouMin Chen
Tang Yun ping
Joseph Chen
Ibai Erkiaga
Wu Liangqing
Wenping Zhang
Elaine Zhang
Jon Lin
Yifeng Zhao
Sugar Zhang
Lin Jinhan
Wyon Bi
Ren Jianing