From fc656fc366cf5a7efc56712ccc46a5aaccfea62b Mon Sep 17 00:00:00 2001 From: Jon Lin Date: Fri, 10 Jul 2020 11:50:46 +0800 Subject: [PATCH] mtd: spinand: Support xtx devices Support XT26G01A, XT26G02A, XT26G04A, XT26G01B, XT26G02B Change-Id: I447d83e5c5da8f6ba8515aab77a8039fe9cb2cc4 Signed-off-by: Jon Lin --- drivers/mtd/nand/spi/Makefile | 2 +- drivers/mtd/nand/spi/core.c | 1 + drivers/mtd/nand/spi/xtx.c | 235 ++++++++++++++++++++++++++++++++++ include/linux/mtd/spinand.h | 1 + 4 files changed, 238 insertions(+), 1 deletion(-) create mode 100644 drivers/mtd/nand/spi/xtx.c diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile index 69aced385d..efe26c6ed0 100644 --- a/drivers/mtd/nand/spi/Makefile +++ b/drivers/mtd/nand/spi/Makefile @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-2.0 -spinand-objs := core.o gigadevice.o macronix.o micron.o toshiba.o winbond.o dosilicon.o esmt.o +spinand-objs := core.o gigadevice.o macronix.o micron.o toshiba.o winbond.o dosilicon.o esmt.o xtx.o obj-$(CONFIG_MTD_SPI_NAND) += spinand.o diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index 59c412ed36..c251c3bb28 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -826,6 +826,7 @@ static const struct spinand_manufacturer *spinand_manufacturers[] = { &winbond_spinand_manufacturer, &dosilicon_spinand_manufacturer, &esmt_spinand_manufacturer, + &xtx_spinand_manufacturer, }; static int spinand_manufacturer_detect(struct spinand_device *spinand) diff --git a/drivers/mtd/nand/spi/xtx.c b/drivers/mtd/nand/spi/xtx.c new file mode 100644 index 0000000000..74e632233a --- /dev/null +++ b/drivers/mtd/nand/spi/xtx.c @@ -0,0 +1,235 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2020 Rockchip Electronics Co., Ltd + * + * Authors: + * Dingqiang Lin + */ + +#ifndef __UBOOT__ +#include +#include +#endif +#include + +#define SPINAND_MFR_XTX 0x0B + +static SPINAND_OP_VARIANTS(read_cache_variants, + SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); + +static SPINAND_OP_VARIANTS(write_cache_variants, + SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), + SPINAND_PROG_LOAD(true, 0, NULL, 0)); + +static SPINAND_OP_VARIANTS(update_cache_variants, + SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), + SPINAND_PROG_LOAD(false, 0, NULL, 0)); + +static int xt26g0xa_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + if (section) + return -ERANGE; + + region->offset = 48; + region->length = 16; + + return 0; +} + +static int xt26g0xa_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + if (section) + return -ERANGE; + + region->offset = 2; + region->length = mtd->oobsize - 18; + + return 0; +} + +static const struct mtd_ooblayout_ops xt26g0xa_ooblayout = { + .ecc = xt26g0xa_ooblayout_ecc, + .rfree = xt26g0xa_ooblayout_free, +}; + +static int xt26g01b_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + return -ERANGE; +} + +static int xt26g01b_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + if (section) + return -ERANGE; + + region->offset = 2; + region->length = mtd->oobsize - 2; + + return 0; +} + +static const struct mtd_ooblayout_ops xt26g01b_ooblayout = { + .ecc = xt26g01b_ooblayout_ecc, + .rfree = xt26g01b_ooblayout_free, +}; + +static int xt26g02b_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + if (section > 3) + return -ERANGE; + + region->offset = (16 * section) + 8; + region->length = 8; + + return 0; +} + +static int xt26g02b_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + if (section > 3) + return -ERANGE; + + region->offset = (16 * section) + 2; + region->length = 6; + + return 0; +} + +static const struct mtd_ooblayout_ops xt26g02b_ooblayout = { + .ecc = xt26g02b_ooblayout_ecc, + .rfree = xt26g02b_ooblayout_free, +}; + +/* + * ecc bits: 0xC0[2,5] + * [0x0000], No bit errors were detected; + * [0x0001, 0x0111], Bit errors were detected and corrected. Not + * reach Flipping Bits; + * [0x1000], Multiple bit errors were detected and + * not corrected. + * [0x1100], Bit error count equals the bit flip + * detectionthreshold + * else, reserved + */ +static int xt26g0xa_ecc_get_status(struct spinand_device *spinand, + u8 status) +{ + u8 eccsr = (status & GENMASK(5, 2)) >> 2; + + if (eccsr <= 7) + return eccsr; + else if (eccsr == 12) + return 8; + else + return -EBADMSG; +} + +/* + * ecc bits: 0xC0[4,6] + * [0x0], No bit errors were detected; + * [0x001, 0x011], Bit errors were detected and corrected. Not + * reach Flipping Bits; + * [0x100], Bit error count equals the bit flip + * detectionthreshold + * [0x101, 0x110], Reserved; + * [0x111], Multiple bit errors were detected and + * not corrected. + */ +static int xt26g02b_ecc_get_status(struct spinand_device *spinand, + u8 status) +{ + u8 eccsr = (status & GENMASK(6, 4)) >> 4; + + if (eccsr <= 4) + return eccsr; + else + return -EBADMSG; +} + +static const struct spinand_info xtx_spinand_table[] = { + SPINAND_INFO("XT26G01A", 0xE1, + NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&xt26g0xa_ooblayout, + xt26g0xa_ecc_get_status)), + SPINAND_INFO("XT26G02A", 0xE2, + NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&xt26g0xa_ooblayout, + xt26g0xa_ecc_get_status)), + SPINAND_INFO("XT26G04A", 0xE3, + NAND_MEMORG(1, 2048, 64, 128, 2048, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&xt26g0xa_ooblayout, + xt26g0xa_ecc_get_status)), + SPINAND_INFO("XT26G01B", 0xF1, + NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&xt26g01b_ooblayout, + xt26g0xa_ecc_get_status)), + SPINAND_INFO("XT26G02B", 0xF2, + NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&xt26g02b_ooblayout, + xt26g02b_ecc_get_status)), +}; + +static int xtx_spinand_detect(struct spinand_device *spinand) +{ + u8 *id = spinand->id.data; + int ret; + + /* + * XTX SPI NAND read ID needs a dummy byte, so the first byte in + * raw_id is garbage. + */ + if (id[1] != SPINAND_MFR_XTX) + return 0; + + ret = spinand_match_and_init(spinand, xtx_spinand_table, + ARRAY_SIZE(xtx_spinand_table), + id[2]); + if (ret) + return ret; + + return 1; +} + +static const struct spinand_manufacturer_ops xtx_spinand_manuf_ops = { + .detect = xtx_spinand_detect, +}; + +const struct spinand_manufacturer xtx_spinand_manufacturer = { + .id = SPINAND_MFR_XTX, + .name = "xtx", + .ops = &xtx_spinand_manuf_ops, +}; diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h index 4789976344..5206ad60a7 100644 --- a/include/linux/mtd/spinand.h +++ b/include/linux/mtd/spinand.h @@ -208,6 +208,7 @@ extern const struct spinand_manufacturer toshiba_spinand_manufacturer; extern const struct spinand_manufacturer winbond_spinand_manufacturer; extern const struct spinand_manufacturer dosilicon_spinand_manufacturer; extern const struct spinand_manufacturer esmt_spinand_manufacturer; +extern const struct spinand_manufacturer xtx_spinand_manufacturer; /** * struct spinand_op_variants - SPI NAND operation variants