From f270a3f8f1778b63ebcf6fb34fac70a2ccfdae9c Mon Sep 17 00:00:00 2001
From: Joseph Chen <chenjh@rock-chips.com>
Date: Mon, 27 Nov 2017 16:56:36 +0800
Subject: [PATCH] rockchip: add rockchip smccc support

It supports rockchip platforms individual conversation
between U-Boot and ATF via ARM SMCCC.

Change-Id: I75077219f409e075bd3d0b312b2d85c205d6a96f
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
---
 .../asm/arch-rockchip/rockchip_smccc.h        | 16 ++++++
 arch/arm/mach-rockchip/Kconfig                |  6 +++
 arch/arm/mach-rockchip/Makefile               |  2 +
 arch/arm/mach-rockchip/rockchip_smccc.c       | 50 +++++++++++++++++++
 4 files changed, 74 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
 create mode 100644 arch/arm/mach-rockchip/rockchip_smccc.c

diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
new file mode 100644
index 0000000000..7a2b0a7420
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
@@ -0,0 +1,16 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __ROCKCHIP_SMCCC_H__
+#define __ROCKCHIP_SMCCC_H__
+
+/* Stand PSCI system suspend */
+int psci_system_suspend(unsigned long unused);
+
+int sip_smc_set_suspend_mode(unsigned long ctrl,
+			     unsigned long config1,
+			     unsigned long config2);
+#endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index c61adedbb7..8210c0743a 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -310,6 +310,12 @@ config ROCKCHIP_VENDOR_PARTITION
           This enable support to read/write vendor configuration data from/to
 	  this partition
 
+config ROCKCHIP_SMCCC
+	bool "Rockchip SMCCC"
+	default y if ARM_SMCCC
+	help
+	  This enable support for Rockchip SMC calls
+
 config GICV2
 	bool "ARM GICv2"
 
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index ba38e97623..b58aa37620 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -31,6 +31,8 @@ ifneq ($(CONFIG_ROCKCHIP_BOOT_MODE_REG),0)
 obj-y += boot_mode.o
 endif
 
+obj-$(CONFIG_ROCKCHIP_SMCCC) += rockchip_smccc.o
+
 obj-$(CONFIG_ROCKCHIP_BLOCK_API) += blk.o
 obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += vendor.o
 obj-$(CONFIG_ROCKCHIP_PARAM) += rockchip_parameter.o
diff --git a/arch/arm/mach-rockchip/rockchip_smccc.c b/arch/arm/mach-rockchip/rockchip_smccc.c
new file mode 100644
index 0000000000..ea56758e0d
--- /dev/null
+++ b/arch/arm/mach-rockchip/rockchip_smccc.c
@@ -0,0 +1,50 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <asm/arch/rockchip_smccc.h>
+#include <asm/io.h>
+#include <asm/psci.h>
+#include <asm/suspend.h>
+#include <linux/arm-smccc.h>
+
+#ifdef CONFIG_ARM64
+#define ARM_PSCI_1_0_SYSTEM_SUSPEND	ARM_PSCI_1_0_FN64_SYSTEM_SUSPEND
+#else
+#define ARM_PSCI_1_0_SYSTEM_SUSPEND	ARM_PSCI_1_0_FN_SYSTEM_SUSPEND
+#endif
+
+/* Rockchip platform SiP call ID */
+#define SIP_SUSPEND_MODE		0x82000003
+
+static struct arm_smccc_res __invoke_sip_fn_smc(unsigned long function_id,
+						unsigned long arg0,
+						unsigned long arg1,
+						unsigned long arg2)
+{
+	struct arm_smccc_res res;
+
+	arm_smccc_smc(function_id, arg0, arg1, arg2, 0, 0, 0, 0, &res);
+	return res;
+}
+
+int psci_system_suspend(unsigned long unused)
+{
+	struct arm_smccc_res res;
+
+	res = __invoke_sip_fn_smc(ARM_PSCI_1_0_SYSTEM_SUSPEND,
+				  virt_to_phys(cpu_resume), 0, 0);
+	return res.a0;
+}
+
+int sip_smc_set_suspend_mode(unsigned long ctrl,
+			     unsigned long config1,
+			     unsigned long config2)
+{
+	struct arm_smccc_res res;
+
+	res = __invoke_sip_fn_smc(SIP_SUSPEND_MODE, ctrl, config1, config2);
+	return res.a0;
+}