rockchip: rename rv1109 to rv1126

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I37820775ebd7adeb2a29113c2c7d31cdf1186594
This commit is contained in:
Joseph Chen 2020-02-21 10:30:24 +08:00
parent 8852fef858
commit e7c03ac680
9 changed files with 36 additions and 36 deletions

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@ -422,12 +422,12 @@ config TPL_STACK
endif
config ROCKCHIP_RV1109
bool "Support Rockchip RV1109"
config ROCKCHIP_RV1126
bool "Support Rockchip RV1126"
select CPU_V7
select BOARD_LATE_INIT
help
The Rockchip RV1109 is a ARM-based SoC with a dual-core Cortex-A7
The Rockchip RV1126 is a ARM-based SoC with a quad-core Cortex-A7
and a risc-v core.
config SPL_ROCKCHIP_BACK_TO_BROM
@ -471,7 +471,7 @@ config ROCKCHIP_BOOT_MODE_REG
default 0xff320300 if ROCKCHIP_RK3399
default 0xfe020200 if ROCKCHIP_RK1808
default 0x10300580 if ROCKCHIP_RV1108
default 0xfe020200 if ROCKCHIP_RV1109
default 0xfe020200 if ROCKCHIP_RV1126
default 0
help
The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h)
@ -491,7 +491,7 @@ config ROCKCHIP_STIMER_BASE
default 0xff830020 if ROCKCHIP_RK3368
default 0xff8680a0 if ROCKCHIP_RK3399
default 0x10350020 if ROCKCHIP_RV1108
default 0xff670020 if ROCKCHIP_RV1109
default 0xff670020 if ROCKCHIP_RV1126
default 0
help
The secure timer inited in SPL/TPL in secure word, ARM generic timer
@ -510,7 +510,7 @@ config ROCKCHIP_IRAM_START_ADDR
default 0xff8c0000 if ROCKCHIP_RK3368
default 0xff8c0000 if ROCKCHIP_RK3399
default 0x10080000 if ROCKCHIP_RV1108
default 0xff700000 if ROCKCHIP_RV1109
default 0xff700000 if ROCKCHIP_RV1126
default 0
help
The IRAM start addr is to locate variant of the boot device from
@ -701,6 +701,6 @@ source "arch/arm/mach-rockchip/rk3368/Kconfig"
source "arch/arm/mach-rockchip/rk3399/Kconfig"
source "arch/arm/mach-rockchip/rk1808/Kconfig"
source "arch/arm/mach-rockchip/rv1108/Kconfig"
source "arch/arm/mach-rockchip/rv1109/Kconfig"
source "arch/arm/mach-rockchip/rv1126/Kconfig"
endif

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@ -52,7 +52,7 @@ obj-$(CONFIG_ROCKCHIP_RK3368) += rk3368/
obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399/
obj-$(CONFIG_ROCKCHIP_RK1808) += rk1808/
obj-$(CONFIG_ROCKCHIP_RV1108) += rv1108/
obj-$(CONFIG_ROCKCHIP_RV1109) += rv1109/
obj-$(CONFIG_ROCKCHIP_RV1126) += rv1126/
# Clear out SPL objects, in case this is a TPL build
obj-spl-$(CONFIG_TPL_BUILD) =

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@ -1,16 +0,0 @@
if ROCKCHIP_RV1109
config TARGET_EVB_RV1109
bool "EVB_RV1109"
help
RV1109 EVB is a evaluation board for Rockchp RV1109.
config SYS_SOC
default "rockchip"
config SYS_MALLOC_F_LEN
default 0x400
source board/rockchip/evb_rv1109/Kconfig
endif

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@ -0,0 +1,16 @@
if ROCKCHIP_RV1126
config TARGET_EVB_RV1126
bool "EVB_RV1126"
help
RV1126 EVB is a evaluation board for Rockchp RV1126.
config SYS_SOC
default "rockchip"
config SYS_MALLOC_F_LEN
default 0x400
source board/rockchip/evb_rv1126/Kconfig
endif

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@ -4,5 +4,5 @@
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += syscon_rv1109.o
obj-y += rv1109.o
obj-y += syscon_rv1126.o
obj-y += rv1126.o

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@ -9,14 +9,14 @@
#include <syscon.h>
#include <asm/arch/clock.h>
static const struct udevice_id rv1109_syscon_ids[] = {
{ .compatible = "rockchip,rv1109-grf", .data = ROCKCHIP_SYSCON_GRF },
static const struct udevice_id rv1126_syscon_ids[] = {
{ .compatible = "rockchip,rv1126-grf", .data = ROCKCHIP_SYSCON_GRF },
{ }
};
U_BOOT_DRIVER(syscon_rv1109) = {
.name = "rv1109_syscon",
U_BOOT_DRIVER(syscon_rv1126) = {
.name = "rv1126_syscon",
.id = UCLASS_SYSCON,
.of_match = rv1109_syscon_ids,
.of_match = rv1126_syscon_ids,
};

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@ -4,10 +4,10 @@
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __EVB_RV1109_H
#define __EVB_RV1109_H
#ifndef __EVB_RV1126_H
#define __EVB_RV1126_H
#include <configs/rv1109_common.h>
#include <configs/rv1126_common.h>
#define CONFIG_SUPPORT_EMMC_RPMB
#define CONFIG_SYS_MMC_ENV_DEV 0

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@ -4,8 +4,8 @@
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_RV1109_COMMON_H
#define __CONFIG_RV1109_COMMON_H
#ifndef __CONFIG_RV1126_COMMON_H
#define __CONFIG_RV1126_COMMON_H
#include "rockchip-common.h"