UPSTREAM: stm32mp1: add stusb1600 support for DK1 and DK2 board
The DK1 and DK2 boards use the USB Type-C controller STUSB1600. This patch updates: - the device tree to add the I2C node in the DT - the board stm32mp1 to probe this I2C device and use this controller to check cable detection. - the DWC2 driver to support a new dt property "u-boot,force-b-session-valid" which forces B session and device mode; it is a workaround because the VBUS sensing and ID detection isn't available with stusb1600. Conflicts: arch/arm/dts/stm32mp157-pinctrl.dtsi arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi arch/arm/dts/stm32mp157a-dk1.dts board/st/stm32mp1/stm32mp1.c Change-Id: I73b62dce9c3e0661e6d2463b87389229cd3559a7 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> (cherry picked from commit 6fe7dd3327d552bacf4266d7f1ed074bf98ffb92)
This commit is contained in:
Patrick Delaunay
Frank Wang
parent
acd7aca8c0
commit
db704406b3
|
|
@ -0,0 +1,453 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) STMicroelectronics 2017 - All Rights Reserved
|
||||
* Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
|
||||
*/
|
||||
#include <dt-bindings/pinctrl/stm32-pinfunc.h>
|
||||
|
||||
/ {
|
||||
soc {
|
||||
pinctrl: pin-controller@50002000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "st,stm32mp157-pinctrl";
|
||||
ranges = <0 0x50002000 0xa400>;
|
||||
interrupt-parent = <&exti>;
|
||||
st,syscfg = <&exti 0x60 0xff>;
|
||||
pins-are-numbered;
|
||||
|
||||
gpioa: gpio@50002000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x0 0x400>;
|
||||
clocks = <&rcc GPIOA>;
|
||||
st,bank-name = "GPIOA";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 0 16>;
|
||||
};
|
||||
|
||||
gpiob: gpio@50003000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x1000 0x400>;
|
||||
clocks = <&rcc GPIOB>;
|
||||
st,bank-name = "GPIOB";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 16 16>;
|
||||
};
|
||||
|
||||
gpioc: gpio@50004000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x2000 0x400>;
|
||||
clocks = <&rcc GPIOC>;
|
||||
st,bank-name = "GPIOC";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 32 16>;
|
||||
};
|
||||
|
||||
gpiod: gpio@50005000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x3000 0x400>;
|
||||
clocks = <&rcc GPIOD>;
|
||||
st,bank-name = "GPIOD";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 48 16>;
|
||||
};
|
||||
|
||||
gpioe: gpio@50006000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x4000 0x400>;
|
||||
clocks = <&rcc GPIOE>;
|
||||
st,bank-name = "GPIOE";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 64 16>;
|
||||
};
|
||||
|
||||
gpiof: gpio@50007000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x5000 0x400>;
|
||||
clocks = <&rcc GPIOF>;
|
||||
st,bank-name = "GPIOF";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 80 16>;
|
||||
};
|
||||
|
||||
gpiog: gpio@50008000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x6000 0x400>;
|
||||
clocks = <&rcc GPIOG>;
|
||||
st,bank-name = "GPIOG";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 96 16>;
|
||||
};
|
||||
|
||||
gpioh: gpio@50009000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x7000 0x400>;
|
||||
clocks = <&rcc GPIOH>;
|
||||
st,bank-name = "GPIOH";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 112 16>;
|
||||
};
|
||||
|
||||
gpioi: gpio@5000a000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x8000 0x400>;
|
||||
clocks = <&rcc GPIOI>;
|
||||
st,bank-name = "GPIOI";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 128 16>;
|
||||
};
|
||||
|
||||
gpioj: gpio@5000b000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x9000 0x400>;
|
||||
clocks = <&rcc GPIOJ>;
|
||||
st,bank-name = "GPIOJ";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 144 16>;
|
||||
};
|
||||
|
||||
gpiok: gpio@5000c000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0xa000 0x400>;
|
||||
clocks = <&rcc GPIOK>;
|
||||
st,bank-name = "GPIOK";
|
||||
ngpios = <8>;
|
||||
gpio-ranges = <&pinctrl 0 160 8>;
|
||||
};
|
||||
|
||||
adc12_usb_pwr_pins_a: adc12-usb-pwr-pins-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* ADC12 in18 */
|
||||
<STM32_PINMUX('A', 5, ANALOG)>; /* ADC12 in19 */
|
||||
};
|
||||
};
|
||||
|
||||
cec_pins_a: cec-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('A', 15, AF4)>;
|
||||
bias-disable;
|
||||
drive-open-drain;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet0_rgmii_pins_a: rgmii-0 {
|
||||
pins1 {
|
||||
pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
|
||||
<STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
|
||||
<STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
|
||||
<STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
|
||||
<STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
|
||||
<STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
|
||||
<STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
|
||||
<STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
|
||||
<STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
|
||||
bias-disable;
|
||||
drive-push-pull;
|
||||
slew-rate = <3>;
|
||||
};
|
||||
pins2 {
|
||||
pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
|
||||
<STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
|
||||
<STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
|
||||
<STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
|
||||
<STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
|
||||
<STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet0_rgmii_pins_sleep_a: rgmii-sleep-0 {
|
||||
pins1 {
|
||||
pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
|
||||
<STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
|
||||
<STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
|
||||
<STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
|
||||
<STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
|
||||
<STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
|
||||
<STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
|
||||
<STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
|
||||
<STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
|
||||
<STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
|
||||
<STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
|
||||
<STM32_PINMUX('B', 0, ANALOG)>, /* ETH_RGMII_RXD2 */
|
||||
<STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
|
||||
<STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
|
||||
<STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
|
||||
};
|
||||
};
|
||||
|
||||
i2c1_pins_a: i2c1-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
|
||||
<STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
|
||||
bias-disable;
|
||||
drive-open-drain;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c2_pins_a: i2c2-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
|
||||
<STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
|
||||
bias-disable;
|
||||
drive-open-drain;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c5_pins_a: i2c5-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
|
||||
<STM32_PINMUX('A', 12, AF4)>; /* I2C5_SDA */
|
||||
bias-disable;
|
||||
drive-open-drain;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
m_can1_pins_a: m-can1-0 {
|
||||
pins1 {
|
||||
pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
|
||||
slew-rate = <1>;
|
||||
drive-push-pull;
|
||||
bias-disable;
|
||||
};
|
||||
pins2 {
|
||||
pinmux = <STM32_PINMUX('I', 9, AF9)>; /* CAN1_RX */
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
pwm2_pins_a: pwm2-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */
|
||||
bias-pull-down;
|
||||
drive-push-pull;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
pwm8_pins_a: pwm8-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('I', 2, AF3)>; /* TIM8_CH4 */
|
||||
bias-pull-down;
|
||||
drive-push-pull;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
pwm12_pins_a: pwm12-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */
|
||||
bias-pull-down;
|
||||
drive-push-pull;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
qspi_clk_pins_a: qspi-clk-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
|
||||
bias-disable;
|
||||
drive-push-pull;
|
||||
slew-rate = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
qspi_bk1_pins_a: qspi-bk1-0 {
|
||||
pins1 {
|
||||
pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
|
||||
<STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
|
||||
<STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
|
||||
<STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
|
||||
bias-disable;
|
||||
drive-push-pull;
|
||||
slew-rate = <3>;
|
||||
};
|
||||
pins2 {
|
||||
pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
|
||||
bias-pull-up;
|
||||
drive-push-pull;
|
||||
slew-rate = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
qspi_bk2_pins_a: qspi-bk2-0 {
|
||||
pins1 {
|
||||
pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
|
||||
<STM32_PINMUX('H', 3, AF9)>, /* QSPI_BK2_IO1 */
|
||||
<STM32_PINMUX('G', 10, AF11)>, /* QSPI_BK2_IO2 */
|
||||
<STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
|
||||
bias-disable;
|
||||
drive-push-pull;
|
||||
slew-rate = <3>;
|
||||
};
|
||||
pins2 {
|
||||
pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
|
||||
bias-pull-up;
|
||||
drive-push-pull;
|
||||
slew-rate = <3>;
|
||||
};
|
||||
};
|
||||
sdmmc1_b4_pins_a: sdmmc1-b4@0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
|
||||
<STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
|
||||
<STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
|
||||
<STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
|
||||
<STM32_PINMUX('C', 12, AF12)>, /* SDMMC1_CK */
|
||||
<STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
|
||||
slew-rate = <3>;
|
||||
drive-push-pull;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
sdmmc1_dir_pins_a: sdmmc1-dir@0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
|
||||
<STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
|
||||
<STM32_PINMUX('B', 9, AF11)>, /* SDMMC1_CDIR */
|
||||
<STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
|
||||
slew-rate = <3>;
|
||||
drive-push-pull;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
sdmmc2_b4_pins_a: sdmmc2-b4@0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
|
||||
<STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
|
||||
<STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
|
||||
<STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
|
||||
<STM32_PINMUX('E', 3, AF9)>, /* SDMMC2_CK */
|
||||
<STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
|
||||
slew-rate = <3>;
|
||||
drive-push-pull;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
sdmmc2_d47_pins_a: sdmmc2-d47@0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
|
||||
<STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
|
||||
<STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
|
||||
<STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */
|
||||
slew-rate = <3>;
|
||||
drive-push-pull;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
stusb1600_pins_a: stusb1600-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('I', 11, ANALOG)>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
uart4_pins_a: uart4-0 {
|
||||
pins1 {
|
||||
pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
|
||||
bias-disable;
|
||||
drive-push-pull;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
pins2 {
|
||||
pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
usbotg_hs_pins_a: usbotg_hs-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_z: pin-controller-z@54004000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "st,stm32mp157-z-pinctrl";
|
||||
ranges = <0 0x54004000 0x400>;
|
||||
pins-are-numbered;
|
||||
interrupt-parent = <&exti>;
|
||||
st,syscfg = <&exti 0x60 0xff>;
|
||||
|
||||
gpioz: gpio@54004000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0 0x400>;
|
||||
clocks = <&rcc GPIOZ>;
|
||||
st,bank-name = "GPIOZ";
|
||||
st,bank-ioport = <11>;
|
||||
ngpios = <8>;
|
||||
gpio-ranges = <&pinctrl_z 0 400 8>;
|
||||
};
|
||||
|
||||
i2c4_pins_a: i2c4-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
|
||||
<STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
|
||||
bias-disable;
|
||||
drive-open-drain;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
spi1_pins_a: spi1-0 {
|
||||
pins1 {
|
||||
pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */
|
||||
<STM32_PINMUX('Z', 2, AF5)>; /* SPI1_MOSI */
|
||||
bias-disable;
|
||||
drive-push-pull;
|
||||
slew-rate = <1>;
|
||||
};
|
||||
|
||||
pins2 {
|
||||
pinmux = <STM32_PINMUX('Z', 1, AF5)>; /* SPI1_MISO */
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,200 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
|
||||
/*
|
||||
* Copyright : STMicroelectronics 2018
|
||||
*/
|
||||
|
||||
#include <dt-bindings/clock/stm32mp1-clksrc.h>
|
||||
#include "stm32mp157-u-boot.dtsi"
|
||||
#include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi"
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
i2c3 = &i2c4;
|
||||
mmc0 = &sdmmc1;
|
||||
usb0 = &usbotg_hs;
|
||||
};
|
||||
config {
|
||||
u-boot,boot-led = "heartbeat";
|
||||
u-boot,error-led = "error";
|
||||
st,adc_usb_pd = <&adc1 18>, <&adc1 19>;
|
||||
};
|
||||
led {
|
||||
red {
|
||||
label = "error";
|
||||
gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
blue {
|
||||
default-state = "on";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&adc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&adc12_usb_pwr_pins_a>;
|
||||
vdd-supply = <&vdd>;
|
||||
vdda-supply = <&vdd>;
|
||||
vref-supply = <&vrefbuf>;
|
||||
status = "okay";
|
||||
adc1: adc@0 {
|
||||
/*
|
||||
* Type-C USB_PWR_CC1 & USB_PWR_CC2 on in18 & in19.
|
||||
* Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C:
|
||||
* 5 * (56 + 47kOhms) * 5pF => 2.5us.
|
||||
* Use arbitrary margin here (e.g. 5µs).
|
||||
*/
|
||||
st,min-sample-time-nsecs = <5000>;
|
||||
/* ANA0, ANA1, USB Type-C CC1 & CC2 */
|
||||
st,adc-channels = <0 1 18 19>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&clk_hse {
|
||||
st,digbypass;
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
|
||||
&i2c4_pins_a {
|
||||
u-boot,dm-pre-reloc;
|
||||
pins {
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
};
|
||||
|
||||
&pmic {
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
|
||||
&rcc {
|
||||
st,clksrc = <
|
||||
CLK_MPU_PLL1P
|
||||
CLK_AXI_PLL2P
|
||||
CLK_MCU_PLL3P
|
||||
CLK_PLL12_HSE
|
||||
CLK_PLL3_HSE
|
||||
CLK_PLL4_HSE
|
||||
CLK_RTC_LSE
|
||||
CLK_MCO1_DISABLED
|
||||
CLK_MCO2_DISABLED
|
||||
>;
|
||||
|
||||
st,clkdiv = <
|
||||
1 /*MPU*/
|
||||
0 /*AXI*/
|
||||
0 /*MCU*/
|
||||
1 /*APB1*/
|
||||
1 /*APB2*/
|
||||
1 /*APB3*/
|
||||
1 /*APB4*/
|
||||
2 /*APB5*/
|
||||
23 /*RTC*/
|
||||
0 /*MCO1*/
|
||||
0 /*MCO2*/
|
||||
>;
|
||||
|
||||
st,pkcs = <
|
||||
CLK_CKPER_HSE
|
||||
CLK_FMC_ACLK
|
||||
CLK_QSPI_ACLK
|
||||
CLK_ETH_DISABLED
|
||||
CLK_SDMMC12_PLL4P
|
||||
CLK_DSI_DSIPLL
|
||||
CLK_STGEN_HSE
|
||||
CLK_USBPHY_HSE
|
||||
CLK_SPI2S1_PLL3Q
|
||||
CLK_SPI2S23_PLL3Q
|
||||
CLK_SPI45_HSI
|
||||
CLK_SPI6_HSI
|
||||
CLK_I2C46_HSI
|
||||
CLK_SDMMC3_PLL4P
|
||||
CLK_USBO_USBPHY
|
||||
CLK_ADC_CKPER
|
||||
CLK_CEC_LSE
|
||||
CLK_I2C12_HSI
|
||||
CLK_I2C35_HSI
|
||||
CLK_UART1_HSI
|
||||
CLK_UART24_HSI
|
||||
CLK_UART35_HSI
|
||||
CLK_UART6_HSI
|
||||
CLK_UART78_HSI
|
||||
CLK_SPDIF_PLL4P
|
||||
CLK_FDCAN_PLL4Q
|
||||
CLK_SAI1_PLL3Q
|
||||
CLK_SAI2_PLL3Q
|
||||
CLK_SAI3_PLL3Q
|
||||
CLK_SAI4_PLL3Q
|
||||
CLK_RNG1_LSI
|
||||
CLK_RNG2_LSI
|
||||
CLK_LPTIM1_PCLK1
|
||||
CLK_LPTIM23_PCLK3
|
||||
CLK_LPTIM45_LSE
|
||||
>;
|
||||
|
||||
/* VCO = 1300.0 MHz => P = 650 (CPU) */
|
||||
pll1: st,pll@0 {
|
||||
cfg = < 2 80 0 0 0 PQR(1,0,0) >;
|
||||
frac = < 0x800 >;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
|
||||
/* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
|
||||
pll2: st,pll@1 {
|
||||
cfg = < 2 65 1 0 0 PQR(1,1,1) >;
|
||||
frac = < 0x1400 >;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
|
||||
/* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
|
||||
pll3: st,pll@2 {
|
||||
cfg = < 1 33 1 16 36 PQR(1,1,1) >;
|
||||
frac = < 0x1a04 >;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
|
||||
/* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
|
||||
pll4: st,pll@3 {
|
||||
cfg = < 3 98 5 7 7 PQR(1,1,1) >;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
};
|
||||
|
||||
&sdmmc1 {
|
||||
u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&sdmmc1_b4_pins_a {
|
||||
u-boot,dm-spl;
|
||||
pins {
|
||||
u-boot,dm-spl;
|
||||
};
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
|
||||
&uart4_pins_a {
|
||||
u-boot,dm-pre-reloc;
|
||||
pins1 {
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
pins2 {
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
};
|
||||
|
||||
&usbotg_hs {
|
||||
u-boot,force-b-session-valid;
|
||||
hnp-srp-disable;
|
||||
};
|
||||
|
||||
&v3v3 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
|
@ -0,0 +1,294 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) STMicroelectronics 2019 - All Rights Reserved
|
||||
* Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "stm32mp157c.dtsi"
|
||||
#include "stm32mp157-pinctrl.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/mfd/st,stpmic1.h>
|
||||
|
||||
/ {
|
||||
model = "STMicroelectronics STM32MP157A-DK1 Discovery Board";
|
||||
compatible = "st,stm32mp157a-dk1", "st,stm32mp157";
|
||||
|
||||
aliases {
|
||||
ethernet0 = ðernet0;
|
||||
serial0 = &uart4;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@c0000000 {
|
||||
reg = <0xc0000000 0x20000000>;
|
||||
};
|
||||
|
||||
led {
|
||||
compatible = "gpio-leds";
|
||||
blue {
|
||||
label = "heartbeat";
|
||||
gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ðernet0 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <ðernet0_rgmii_pins_a>;
|
||||
pinctrl-1 = <ðernet0_rgmii_pins_sleep_a>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
phy-mode = "rgmii";
|
||||
max-speed = <1000>;
|
||||
phy-handle = <&phy0>;
|
||||
|
||||
mdio0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "snps,dwmac-mdio";
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c4_pins_a>;
|
||||
i2c-scl-rising-time-ns = <185>;
|
||||
i2c-scl-falling-time-ns = <20>;
|
||||
status = "okay";
|
||||
/delete-property/dmas;
|
||||
/delete-property/dma-names;
|
||||
|
||||
typec: stusb1600@28 {
|
||||
compatible = "st,stusb1600";
|
||||
reg = <0x28>;
|
||||
interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupt-parent = <&gpioi>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&stusb1600_pins_a>;
|
||||
|
||||
status = "okay";
|
||||
|
||||
typec_con: connector {
|
||||
compatible = "usb-c-connector";
|
||||
label = "USB-C";
|
||||
power-role = "sink";
|
||||
power-opmode = "default";
|
||||
};
|
||||
};
|
||||
|
||||
pmic: stpmic@33 {
|
||||
compatible = "st,stpmic1";
|
||||
reg = <0x33>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
status = "okay";
|
||||
|
||||
st,main-control-register = <0x04>;
|
||||
st,vin-control-register = <0xc0>;
|
||||
st,usb-control-register = <0x20>;
|
||||
|
||||
regulators {
|
||||
compatible = "st,stpmic1-regulators";
|
||||
|
||||
ldo1-supply = <&v3v3>;
|
||||
ldo3-supply = <&vdd_ddr>;
|
||||
ldo6-supply = <&v3v3>;
|
||||
pwr_sw1-supply = <&bst_out>;
|
||||
pwr_sw2-supply = <&bst_out>;
|
||||
|
||||
vddcore: buck1 {
|
||||
regulator-name = "vddcore";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-always-on;
|
||||
regulator-initial-mode = <0>;
|
||||
regulator-over-current-protection;
|
||||
};
|
||||
|
||||
vdd_ddr: buck2 {
|
||||
regulator-name = "vdd_ddr";
|
||||
regulator-min-microvolt = <1350000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-always-on;
|
||||
regulator-initial-mode = <0>;
|
||||
regulator-over-current-protection;
|
||||
};
|
||||
|
||||
vdd: buck3 {
|
||||
regulator-name = "vdd";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
st,mask-reset;
|
||||
regulator-initial-mode = <0>;
|
||||
regulator-over-current-protection;
|
||||
};
|
||||
|
||||
v3v3: buck4 {
|
||||
regulator-name = "v3v3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-over-current-protection;
|
||||
regulator-initial-mode = <0>;
|
||||
};
|
||||
|
||||
v1v8_audio: ldo1 {
|
||||
regulator-name = "v1v8_audio";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
interrupts = <IT_CURLIM_LDO1 0>;
|
||||
};
|
||||
|
||||
v3v3_hdmi: ldo2 {
|
||||
regulator-name = "v3v3_hdmi";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
interrupts = <IT_CURLIM_LDO2 0>;
|
||||
};
|
||||
|
||||
vtt_ddr: ldo3 {
|
||||
regulator-name = "vtt_ddr";
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <750000>;
|
||||
regulator-always-on;
|
||||
regulator-over-current-protection;
|
||||
};
|
||||
|
||||
vdd_usb: ldo4 {
|
||||
regulator-name = "vdd_usb";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
interrupts = <IT_CURLIM_LDO4 0>;
|
||||
};
|
||||
|
||||
vdda: ldo5 {
|
||||
regulator-name = "vdda";
|
||||
regulator-min-microvolt = <2900000>;
|
||||
regulator-max-microvolt = <2900000>;
|
||||
interrupts = <IT_CURLIM_LDO5 0>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
v1v2_hdmi: ldo6 {
|
||||
regulator-name = "v1v2_hdmi";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-always-on;
|
||||
interrupts = <IT_CURLIM_LDO6 0>;
|
||||
|
||||
};
|
||||
|
||||
vref_ddr: vref_ddr {
|
||||
regulator-name = "vref_ddr";
|
||||
regulator-always-on;
|
||||
regulator-over-current-protection;
|
||||
};
|
||||
|
||||
bst_out: boost {
|
||||
regulator-name = "bst_out";
|
||||
interrupts = <IT_OCP_BOOST 0>;
|
||||
};
|
||||
|
||||
vbus_otg: pwr_sw1 {
|
||||
regulator-name = "vbus_otg";
|
||||
interrupts = <IT_OCP_OTG 0>;
|
||||
regulator-active-discharge;
|
||||
};
|
||||
|
||||
vbus_sw: pwr_sw2 {
|
||||
regulator-name = "vbus_sw";
|
||||
interrupts = <IT_OCP_SWOUT 0>;
|
||||
regulator-active-discharge;
|
||||
};
|
||||
};
|
||||
|
||||
onkey {
|
||||
compatible = "st,stpmic1-onkey";
|
||||
interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>;
|
||||
interrupt-names = "onkey-falling", "onkey-rising";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
watchdog {
|
||||
compatible = "st,stpmic1-wdt";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&iwdg2 {
|
||||
timeout-sec = <32>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwr {
|
||||
pwr-supply = <&vdd>;
|
||||
};
|
||||
|
||||
&rng1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rtc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc1_b4_pins_a>;
|
||||
broken-cd;
|
||||
st,neg-edge;
|
||||
bus-width = <4>;
|
||||
vmmc-supply = <&v3v3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart4_pins_a>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbh_ehci {
|
||||
phys = <&usbphyc_port0>;
|
||||
phy-names = "usb";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg_hs {
|
||||
dr_mode = "peripheral";
|
||||
phys = <&usbphyc_port1 0>;
|
||||
phy-names = "usb2-phy";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbphyc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbphyc_port0 {
|
||||
phy-supply = <&vdd_usb>;
|
||||
};
|
||||
|
||||
&usbphyc_port1 {
|
||||
phy-supply = <&vdd_usb>;
|
||||
};
|
||||
|
||||
&vrefbuf {
|
||||
regulator-min-microvolt = <2500000>;
|
||||
regulator-max-microvolt = <2500000>;
|
||||
vdda-supply = <&vdd>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -0,0 +1,506 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
|
||||
/*
|
||||
* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
|
||||
*/
|
||||
#include <common.h>
|
||||
#include <adc.h>
|
||||
#include <config.h>
|
||||
#include <clk.h>
|
||||
#include <dm.h>
|
||||
#include <g_dnl.h>
|
||||
#include <generic-phy.h>
|
||||
#include <i2c.h>
|
||||
#include <led.h>
|
||||
#include <misc.h>
|
||||
#include <phy.h>
|
||||
#include <reset.h>
|
||||
#include <syscon.h>
|
||||
#include <usb.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/gpio.h>
|
||||
#include <asm/arch/stm32.h>
|
||||
#include <power/regulator.h>
|
||||
#include <usb/dwc2_udc.h>
|
||||
|
||||
/* SYSCFG registers */
|
||||
#define SYSCFG_BOOTR 0x00
|
||||
#define SYSCFG_PMCSETR 0x04
|
||||
#define SYSCFG_IOCTRLSETR 0x18
|
||||
#define SYSCFG_ICNR 0x1C
|
||||
#define SYSCFG_CMPCR 0x20
|
||||
#define SYSCFG_CMPENSETR 0x24
|
||||
#define SYSCFG_PMCCLRR 0x44
|
||||
|
||||
#define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
|
||||
#define SYSCFG_BOOTR_BOOTPD_SHIFT 4
|
||||
|
||||
#define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
|
||||
#define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
|
||||
#define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
|
||||
#define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
|
||||
#define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
|
||||
|
||||
#define SYSCFG_CMPCR_SW_CTRL BIT(1)
|
||||
#define SYSCFG_CMPCR_READY BIT(8)
|
||||
|
||||
#define SYSCFG_CMPENSETR_MPU_EN BIT(0)
|
||||
|
||||
#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
|
||||
#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
|
||||
|
||||
#define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
|
||||
|
||||
#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
|
||||
#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII (0 << 21)
|
||||
#define SYSCFG_PMCSETR_ETH_SEL_RGMII (1 << 21)
|
||||
#define SYSCFG_PMCSETR_ETH_SEL_RMII (4 << 21)
|
||||
|
||||
/*
|
||||
* Get a global data pointer
|
||||
*/
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
#define USB_WARNING_LOW_THRESHOLD_UV 660000
|
||||
#define USB_START_LOW_THRESHOLD_UV 1230000
|
||||
#define USB_START_HIGH_THRESHOLD_UV 2100000
|
||||
|
||||
int checkboard(void)
|
||||
{
|
||||
int ret;
|
||||
char *mode;
|
||||
u32 otp;
|
||||
struct udevice *dev;
|
||||
const char *fdt_compat;
|
||||
int fdt_compat_len;
|
||||
|
||||
if (IS_ENABLED(CONFIG_STM32MP1_TRUSTED))
|
||||
mode = "trusted";
|
||||
else
|
||||
mode = "basic";
|
||||
|
||||
printf("Board: stm32mp1 in %s mode", mode);
|
||||
fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
|
||||
&fdt_compat_len);
|
||||
if (fdt_compat && fdt_compat_len)
|
||||
printf(" (%s)", fdt_compat);
|
||||
puts("\n");
|
||||
|
||||
ret = uclass_get_device_by_driver(UCLASS_MISC,
|
||||
DM_GET_DRIVER(stm32mp_bsec),
|
||||
&dev);
|
||||
|
||||
if (!ret)
|
||||
ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
|
||||
&otp, sizeof(otp));
|
||||
if (!ret && otp) {
|
||||
printf("Board: MB%04x Var%d Rev.%c-%02d\n",
|
||||
otp >> 16,
|
||||
(otp >> 12) & 0xF,
|
||||
((otp >> 8) & 0xF) - 1 + 'A',
|
||||
otp & 0xF);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void board_key_check(void)
|
||||
{
|
||||
#if defined(CONFIG_FASTBOOT) || defined(CONFIG_CMD_STM32PROG)
|
||||
ofnode node;
|
||||
struct gpio_desc gpio;
|
||||
enum forced_boot_mode boot_mode = BOOT_NORMAL;
|
||||
|
||||
node = ofnode_path("/config");
|
||||
if (!ofnode_valid(node)) {
|
||||
debug("%s: no /config node?\n", __func__);
|
||||
return;
|
||||
}
|
||||
#ifdef CONFIG_FASTBOOT
|
||||
if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
|
||||
&gpio, GPIOD_IS_IN)) {
|
||||
debug("%s: could not find a /config/st,fastboot-gpios\n",
|
||||
__func__);
|
||||
} else {
|
||||
if (dm_gpio_get_value(&gpio)) {
|
||||
puts("Fastboot key pressed, ");
|
||||
boot_mode = BOOT_FASTBOOT;
|
||||
}
|
||||
|
||||
dm_gpio_free(NULL, &gpio);
|
||||
}
|
||||
#endif
|
||||
#ifdef CONFIG_CMD_STM32PROG
|
||||
if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
|
||||
&gpio, GPIOD_IS_IN)) {
|
||||
debug("%s: could not find a /config/st,stm32prog-gpios\n",
|
||||
__func__);
|
||||
} else {
|
||||
if (dm_gpio_get_value(&gpio)) {
|
||||
puts("STM32Programmer key pressed, ");
|
||||
boot_mode = BOOT_STM32PROG;
|
||||
}
|
||||
dm_gpio_free(NULL, &gpio);
|
||||
}
|
||||
#endif
|
||||
|
||||
if (boot_mode != BOOT_NORMAL) {
|
||||
puts("entering download mode...\n");
|
||||
clrsetbits_le32(TAMP_BOOT_CONTEXT,
|
||||
TAMP_BOOT_FORCED_MASK,
|
||||
boot_mode);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
|
||||
|
||||
/* STMicroelectronics STUSB1600 Type-C controller */
|
||||
#define STUSB1600_CC_CONNECTION_STATUS 0x0E
|
||||
|
||||
/* STUSB1600_CC_CONNECTION_STATUS bitfields */
|
||||
#define STUSB1600_CC_ATTACH BIT(0)
|
||||
|
||||
static int stusb1600_init(struct udevice **dev_stusb1600)
|
||||
{
|
||||
ofnode node;
|
||||
struct udevice *dev, *bus;
|
||||
int ret;
|
||||
u32 chip_addr;
|
||||
|
||||
*dev_stusb1600 = NULL;
|
||||
|
||||
/* if node stusb1600 is present, means DK1 or DK2 board */
|
||||
node = ofnode_by_compatible(ofnode_null(), "st,stusb1600");
|
||||
if (!ofnode_valid(node))
|
||||
return -ENODEV;
|
||||
|
||||
ret = ofnode_read_u32(node, "reg", &chip_addr);
|
||||
if (ret)
|
||||
return -EINVAL;
|
||||
|
||||
ret = uclass_get_device_by_ofnode(UCLASS_I2C, ofnode_get_parent(node),
|
||||
&bus);
|
||||
if (ret) {
|
||||
printf("bus for stusb1600 not found\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
ret = dm_i2c_probe(bus, chip_addr, 0, &dev);
|
||||
if (!ret)
|
||||
*dev_stusb1600 = dev;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int stusb1600_cable_connected(struct udevice *dev)
|
||||
{
|
||||
u8 status;
|
||||
|
||||
if (dm_i2c_read(dev, STUSB1600_CC_CONNECTION_STATUS, &status, 1))
|
||||
return 0;
|
||||
|
||||
return status & STUSB1600_CC_ATTACH;
|
||||
}
|
||||
|
||||
#include <usb/dwc2_udc.h>
|
||||
int g_dnl_board_usb_cable_connected(void)
|
||||
{
|
||||
struct udevice *stusb1600;
|
||||
struct udevice *dwc2_udc_otg;
|
||||
int ret;
|
||||
|
||||
if (!stusb1600_init(&stusb1600))
|
||||
return stusb1600_cable_connected(stusb1600);
|
||||
|
||||
ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
|
||||
DM_GET_DRIVER(dwc2_udc_otg),
|
||||
&dwc2_udc_otg);
|
||||
if (!ret)
|
||||
debug("dwc2_udc_otg init failed\n");
|
||||
|
||||
return dwc2_udc_B_session_valid(dwc2_udc_otg);
|
||||
}
|
||||
#endif /* CONFIG_USB_GADGET */
|
||||
|
||||
static int get_led(struct udevice **dev, char *led_string)
|
||||
{
|
||||
char *led_name;
|
||||
int ret;
|
||||
|
||||
led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
|
||||
if (!led_name) {
|
||||
pr_debug("%s: could not find %s config string\n",
|
||||
__func__, led_string);
|
||||
return -ENOENT;
|
||||
}
|
||||
ret = led_get_by_label(led_name, dev);
|
||||
if (ret) {
|
||||
debug("%s: get=%d\n", __func__, ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int setup_led(enum led_state_t cmd)
|
||||
{
|
||||
struct udevice *dev;
|
||||
int ret;
|
||||
|
||||
ret = get_led(&dev, "u-boot,boot-led");
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = led_set_state(dev, cmd);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int board_check_usb_power(void)
|
||||
{
|
||||
struct ofnode_phandle_args adc_args;
|
||||
struct udevice *adc;
|
||||
struct udevice *led;
|
||||
ofnode node;
|
||||
unsigned int raw;
|
||||
int max_uV = 0;
|
||||
int ret, uV, adc_count;
|
||||
u8 i, nb_blink;
|
||||
|
||||
node = ofnode_path("/config");
|
||||
if (!ofnode_valid(node)) {
|
||||
debug("%s: no /config node?\n", __func__);
|
||||
return -ENOENT;
|
||||
}
|
||||
|
||||
/*
|
||||
* Retrieve the ADC channels devices and get measurement
|
||||
* for each of them
|
||||
*/
|
||||
adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
|
||||
"#io-channel-cells");
|
||||
if (adc_count < 0) {
|
||||
if (adc_count == -ENOENT)
|
||||
return 0;
|
||||
|
||||
pr_err("%s: can't find adc channel (%d)\n", __func__,
|
||||
adc_count);
|
||||
|
||||
return adc_count;
|
||||
}
|
||||
|
||||
for (i = 0; i < adc_count; i++) {
|
||||
if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
|
||||
"#io-channel-cells", 0, i,
|
||||
&adc_args)) {
|
||||
pr_debug("%s: can't find /config/st,adc_usb_pd\n",
|
||||
__func__);
|
||||
return 0;
|
||||
}
|
||||
|
||||
ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
|
||||
&adc);
|
||||
|
||||
if (ret) {
|
||||
pr_err("%s: Can't get adc device(%d)\n", __func__,
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = adc_channel_single_shot(adc->name, adc_args.args[0],
|
||||
&raw);
|
||||
if (ret) {
|
||||
pr_err("%s: single shot failed for %s[%d]!\n",
|
||||
__func__, adc->name, adc_args.args[0]);
|
||||
return ret;
|
||||
}
|
||||
/* Convert to uV */
|
||||
if (!adc_raw_to_uV(adc, raw, &uV)) {
|
||||
if (uV > max_uV)
|
||||
max_uV = uV;
|
||||
pr_debug("%s: %s[%02d] = %u, %d uV\n", __func__,
|
||||
adc->name, adc_args.args[0], raw, uV);
|
||||
} else {
|
||||
pr_err("%s: Can't get uV value for %s[%d]\n",
|
||||
__func__, adc->name, adc_args.args[0]);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* If highest value is inside 1.23 Volts and 2.10 Volts, that means
|
||||
* board is plugged on an USB-C 3A power supply and boot process can
|
||||
* continue.
|
||||
*/
|
||||
if (max_uV > USB_START_LOW_THRESHOLD_UV &&
|
||||
max_uV < USB_START_HIGH_THRESHOLD_UV)
|
||||
return 0;
|
||||
|
||||
/* Display warning message and make u-boot,error-led blinking */
|
||||
pr_err("\n*******************************************\n");
|
||||
|
||||
if (max_uV < USB_WARNING_LOW_THRESHOLD_UV) {
|
||||
pr_err("* WARNING 500mA power supply detected *\n");
|
||||
nb_blink = 2;
|
||||
} else {
|
||||
pr_err("* WARNING 1.5A power supply detected *\n");
|
||||
nb_blink = 3;
|
||||
}
|
||||
|
||||
pr_err("* Current too low, use a 3A power supply! *\n");
|
||||
pr_err("*******************************************\n\n");
|
||||
|
||||
ret = get_led(&led, "u-boot,error-led");
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
for (i = 0; i < nb_blink * 2; i++) {
|
||||
led_set_state(led, LEDST_TOGGLE);
|
||||
mdelay(125);
|
||||
}
|
||||
led_set_state(led, LEDST_ON);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void sysconf_init(void)
|
||||
{
|
||||
#ifndef CONFIG_STM32MP1_TRUSTED
|
||||
u8 *syscfg;
|
||||
#ifdef CONFIG_DM_REGULATOR
|
||||
struct udevice *pwr_dev;
|
||||
struct udevice *pwr_reg;
|
||||
struct udevice *dev;
|
||||
int ret;
|
||||
u32 otp = 0;
|
||||
#endif
|
||||
u32 bootr;
|
||||
|
||||
syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
|
||||
|
||||
/* interconnect update : select master using the port 1 */
|
||||
/* LTDC = AXI_M9 */
|
||||
/* GPU = AXI_M8 */
|
||||
/* today information is hardcoded in U-Boot */
|
||||
writel(BIT(9), syscfg + SYSCFG_ICNR);
|
||||
|
||||
/* disable Pull-Down for boot pin connected to VDD */
|
||||
bootr = readl(syscfg + SYSCFG_BOOTR);
|
||||
bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
|
||||
bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
|
||||
writel(bootr, syscfg + SYSCFG_BOOTR);
|
||||
|
||||
#ifdef CONFIG_DM_REGULATOR
|
||||
/* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
|
||||
* and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
|
||||
* The customer will have to disable this for low frequencies
|
||||
* or if AFMUX is selected but the function not used, typically for
|
||||
* TRACE. Otherwise, impact on power consumption.
|
||||
*
|
||||
* WARNING:
|
||||
* enabling High Speed mode while VDD>2.7V
|
||||
* with the OTP product_below_2v5 (OTP 18, BIT 13)
|
||||
* erroneously set to 1 can damage the IC!
|
||||
* => U-Boot set the register only if VDD < 2.7V (in DT)
|
||||
* but this value need to be consistent with board design
|
||||
*/
|
||||
ret = syscon_get_by_driver_data(STM32MP_SYSCON_PWR, &pwr_dev);
|
||||
if (!ret) {
|
||||
ret = uclass_get_device_by_driver(UCLASS_MISC,
|
||||
DM_GET_DRIVER(stm32mp_bsec),
|
||||
&dev);
|
||||
if (ret) {
|
||||
pr_err("Can't find stm32mp_bsec driver\n");
|
||||
return;
|
||||
}
|
||||
|
||||
ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
|
||||
if (!ret)
|
||||
otp = otp & BIT(13);
|
||||
|
||||
/* get VDD = pwr-supply */
|
||||
ret = device_get_supply_regulator(pwr_dev, "pwr-supply",
|
||||
&pwr_reg);
|
||||
|
||||
/* check if VDD is Low Voltage */
|
||||
if (!ret) {
|
||||
if (regulator_get_value(pwr_reg) < 2700000) {
|
||||
writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
|
||||
SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
|
||||
SYSCFG_IOCTRLSETR_HSLVEN_ETH |
|
||||
SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
|
||||
SYSCFG_IOCTRLSETR_HSLVEN_SPI,
|
||||
syscfg + SYSCFG_IOCTRLSETR);
|
||||
|
||||
if (!otp)
|
||||
pr_err("product_below_2v5=0: HSLVEN protected by HW\n");
|
||||
} else {
|
||||
if (otp)
|
||||
pr_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
|
||||
}
|
||||
} else {
|
||||
debug("VDD unknown");
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/* activate automatic I/O compensation
|
||||
* warning: need to ensure CSI enabled and ready in clock driver
|
||||
*/
|
||||
writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
|
||||
|
||||
while (!(readl(syscfg + SYSCFG_CMPCR) & SYSCFG_CMPCR_READY))
|
||||
;
|
||||
clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
|
||||
#endif
|
||||
}
|
||||
|
||||
/* board dependent setup after realloc */
|
||||
int board_init(void)
|
||||
{
|
||||
struct udevice *dev;
|
||||
|
||||
/* address of boot parameters */
|
||||
gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
|
||||
|
||||
/* probe all PINCTRL for hog */
|
||||
for (uclass_first_device(UCLASS_PINCTRL, &dev);
|
||||
dev;
|
||||
uclass_next_device(&dev)) {
|
||||
pr_debug("probe pincontrol = %s\n", dev->name);
|
||||
}
|
||||
|
||||
board_key_check();
|
||||
|
||||
sysconf_init();
|
||||
|
||||
if (IS_ENABLED(CONFIG_LED))
|
||||
led_default_state();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_late_init(void)
|
||||
{
|
||||
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
|
||||
const void *fdt_compat;
|
||||
int fdt_compat_len;
|
||||
|
||||
fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
|
||||
&fdt_compat_len);
|
||||
if (fdt_compat && fdt_compat_len) {
|
||||
if (strncmp(fdt_compat, "st,", 3) != 0)
|
||||
env_set("board_name", fdt_compat);
|
||||
else
|
||||
env_set("board_name", fdt_compat + 3);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* for DK1/DK2 boards */
|
||||
board_check_usb_power();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void board_quiesce_devices(void)
|
||||
{
|
||||
setup_led(LEDST_OFF);
|
||||
}
|
||||
|
|
@ -39,6 +39,8 @@ Refer to phy/phy-bindings.txt for generic phy consumer properties
|
|||
- g-tx-fifo-size: size of periodic tx fifo per endpoint (except ep0) in gadget mode.
|
||||
- usb33d-supply: external VBUS and ID sensing comparators supply, in order to
|
||||
perform OTG operation, used on STM32MP1 SoCs.
|
||||
- u-boot,force-b-session-valid: force B-peripheral session instead of relying on
|
||||
VBUS sensing (only valid when dr_mode = "peripheral" and for u-boot).
|
||||
|
||||
Deprecated properties:
|
||||
- g-use-dma: gadget DMA mode is automatically detected
|
||||
|
|
|
|||
|
|
@ -1055,7 +1055,7 @@ static int dwc2_udc_otg_ofdata_to_platdata(struct udevice *dev)
|
|||
platdata->tx_fifo_sz = dev_read_u32_default(dev, "g-tx-fifo-size", 0);
|
||||
|
||||
platdata->force_b_session_valid =
|
||||
dev_read_bool(dev, "force-b-session-valid");
|
||||
dev_read_bool(dev, "u-boot,force-b-session-valid");
|
||||
|
||||
/* force platdata according compatible */
|
||||
drvdata = dev_get_driver_data(dev);
|
||||
|
|
@ -1077,6 +1077,9 @@ static void dwc2_set_stm32mp1_hsotg_params(struct dwc2_plat_otg_data *p)
|
|||
| 0 << 8 /* [0:SRP disable 1:SRP enable]*/
|
||||
| 0 << 6 /* 0: high speed utmi+, 1: full speed serial*/
|
||||
| 0x7 << 0; /* FS timeout calibration**/
|
||||
|
||||
if (p->force_b_session_valid)
|
||||
p->usb_gusbcfg |= 1 << 30; /* FDMOD: Force device mode */
|
||||
}
|
||||
|
||||
static int dwc2_udc_otg_reset_init(struct udevice *dev,
|
||||
|
|
@ -1168,7 +1171,8 @@ static int dwc2_udc_otg_probe(struct udevice *dev)
|
|||
|
||||
if (platdata->force_b_session_valid)
|
||||
/* Override B session bits : value and enable */
|
||||
setbits_le32(&usbotg_reg->gotgctl, B_VALOEN | B_VALOVAL);
|
||||
setbits_le32(&usbotg_reg->gotgctl,
|
||||
A_VALOEN | A_VALOVAL | B_VALOEN | B_VALOVAL);
|
||||
|
||||
ret = dwc2_udc_probe(platdata);
|
||||
if (ret)
|
||||
|
|
|
|||
Loading…
Reference in New Issue