rockchip: rk3036: Enable tpl and optee support

Move original spl to tpl, and add spl to load next stage firmware,
adapt all the address and option for them. Then Enable all the
options for TPL/SPL and OPTEE.

Change-Id: I44568d84984ca2f4b019fc85e80fbcbaba16fed4
Signed-off-by: David Wu <david.wu@rock-chips.com>
This commit is contained in:
David Wu 2017-12-19 20:54:15 +08:00 committed by Kever Yang
parent 30129f2f83
commit cdfcfbcc92
6 changed files with 157 additions and 25 deletions

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@ -25,7 +25,14 @@ config ROCKCHIP_RK3036
bool "Support Rockchip RK3036" bool "Support Rockchip RK3036"
select CPU_V7 select CPU_V7
select SUPPORT_SPL select SUPPORT_SPL
select SUPPORT_TPL
select SPL select SPL
select TPL
select BOARD_LATE_INIT
select ROCKCHIP_BROM_HELPER
select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
select TPL_NEEDS_SEPARATE_STACK if TPL
select DEBUG_UART_BOARD_INIT
help help
The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
including NEON and GPU, Mali-400 graphics, several DDR3 options including NEON and GPU, Mali-400 graphics, several DDR3 options

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@ -1,22 +1,42 @@
CONFIG_ARM=y CONFIG_ARM=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_ROCKCHIP=y CONFIG_ARCH_ROCKCHIP=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x800
CONFIG_ROCKCHIP_RK3036=y CONFIG_ROCKCHIP_RK3036=y
CONFIG_TPL_TEXT_BASE=0x10081000
CONFIG_TPL_STACK=0x10081fff
# CONFIG_SPL_ROCKCHIP_BACK_TO_BROM is not set
CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
CONFIG_RKIMG_BOOTLOADER=y
CONFIG_TARGET_EVB_RK3036=y CONFIG_TARGET_EVB_RK3036=y
CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_STACK_R_ADDR=0x60600000
CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk" CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk"
CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x0 CONFIG_TPL_SYS_MALLOC_F_LEN=0x0
# CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
# CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_CPUINFO is not set
CONFIG_ANDROID_BOOTLOADER=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_SPL_OPTEE_SUPPORT=y
CONFIG_SPL_OPTEE=y
CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_FASTBOOT_BUF_SIZE=0x04000000
CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
# CONFIG_CMD_IMLS is not set # CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPT=y CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y CONFIG_CMD_I2C=y
CONFIG_CMD_LOAD_ANDROID=y
CONFIG_CMD_BOOT_ANDROID=y
CONFIG_CMD_MMC=y CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y CONFIG_CMD_SPI=y
@ -27,17 +47,26 @@ CONFIG_CMD_TIME=y
# CONFIG_SPL_ISO_PARTITION is not set # CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SPL_PARTITION_UUIDS=y CONFIG_SPL_PARTITION_UUIDS=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_REGMAP=y CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
CONFIG_CLK=y CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_LED=y CONFIG_LED=y
CONFIG_MMC_DW=y CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_PINCTRL=y CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_DM_RESET=y CONFIG_DM_RESET=y
# CONFIG_SPL_DM_SERIAL is not set # CONFIG_TPL_DM_SERIAL is not set
CONFIG_DEBUG_UART_BASE=0x20068000 CONFIG_DEBUG_UART_BASE=0x20068000
CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART_SHIFT=2 CONFIG_DEBUG_UART_SHIFT=2
@ -49,6 +78,12 @@ CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_G_DNL_MANUFACTURER="Rockchip" CONFIG_G_DNL_MANUFACTURER="Rockchip"
CONFIG_G_DNL_VENDOR_NUM=0x2207 CONFIG_G_DNL_VENDOR_NUM=0x2207
CONFIG_G_DNL_PRODUCT_NUM=0x310a CONFIG_G_DNL_PRODUCT_NUM=0x310a
CONFIG_SPL_TINY_MEMSET=y
CONFIG_CMD_DHRYSTONE=y CONFIG_CMD_DHRYSTONE=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_ERRNO_STR=y CONFIG_ERRNO_STR=y
CONFIG_AVB_LIBAVB=y
CONFIG_AVB_LIBAVB_AB=y
CONFIG_AVB_LIBAVB_ATX=y
CONFIG_AVB_LIBAVB_USER=y
CONFIG_OPTEE_CLIENT=y
CONFIG_OPTEE_V1=y

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@ -1,16 +1,35 @@
CONFIG_ARM=y CONFIG_ARM=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_ROCKCHIP=y CONFIG_ARCH_ROCKCHIP=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x800
CONFIG_ROCKCHIP_RK3036=y CONFIG_ROCKCHIP_RK3036=y
CONFIG_TPL_TEXT_BASE=0x10081000
CONFIG_TPL_STACK=0x10081fff
# CONFIG_SPL_ROCKCHIP_BACK_TO_BROM is not set
CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
CONFIG_RKIMG_BOOTLOADER=y
CONFIG_TARGET_KYLIN_RK3036=y CONFIG_TARGET_KYLIN_RK3036=y
CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_STACK_R_ADDR=0x60600000
CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk" CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk"
CONFIG_SPL_SYS_MALLOC_F_LEN=0x0 CONFIG_DEBUG_UART=y
CONFIG_TPL_SYS_MALLOC_F_LEN=0x0
# CONFIG_ANDROID_BOOT_IMAGE is not set # CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
# CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_SPL_OPTEE_SUPPORT=y
CONFIG_SPL_OPTEE=y
CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_FASTBOOT_BUF_SIZE=0x04000000
CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
# CONFIG_CMD_IMLS is not set # CONFIG_CMD_IMLS is not set
@ -23,21 +42,28 @@ CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y CONFIG_CMD_TIME=y
# CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y
# CONFIG_SPL_ISO_PARTITION is not set CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ENV_IS_IN_MMC=y
CONFIG_REGMAP=y CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
CONFIG_CLK=y CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_LED=y CONFIG_LED=y
CONFIG_MMC_DW=y CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_PINCTRL=y CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_FIXED=y
# CONFIG_SPL_DM_SERIAL is not set CONFIG_RAM=y
CONFIG_SPL_RAM=y
# CONFIG_TPL_DM_SERIAL is not set
CONFIG_DEBUG_UART_BASE=0x20068000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYSRESET=y CONFIG_SYSRESET=y
CONFIG_USB=y CONFIG_USB=y
CONFIG_USB_DWC2=y CONFIG_USB_DWC2=y
@ -51,6 +77,10 @@ CONFIG_G_DNL_PRODUCT_NUM=0x310a
CONFIG_USB_HOST_ETHER=y CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_SMSC95XX=y CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_ERRNO_STR=y CONFIG_ERRNO_STR=y
CONFIG_AVB_LIBAVB=y
CONFIG_AVB_LIBAVB_AB=y
CONFIG_AVB_LIBAVB_ATX=y
CONFIG_AVB_LIBAVB_USER=y
CONFIG_OPTEE_CLIENT=y
CONFIG_OPTEE_V1=y

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@ -7,6 +7,37 @@
#ifndef __CONFIG_H #ifndef __CONFIG_H
#define __CONFIG_H #define __CONFIG_H
#include <linux/sizes.h>
#include <configs/rk3036_common.h> #include <configs/rk3036_common.h>
/* Store env in emmc */
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_SYS_MMC_ENV_PART 0
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_SUPPORT_EMMC_RPMB
#ifndef CONFIG_SPL_BUILD
/* Enable gpt partition table */
#undef CONFIG_PREBOOT
#define CONFIG_PREBOOT \
"mmc dev 0; " \
"gpt guid mmc 0; " \
"if test $? = 1; then " \
"fastboot usb 0; " \
"fi; "
#define CONFIG_SYS_BOOT_RAMDISK_HIGH
/* Store env in emmc */
#define CONFIG_SYS_MMC_ENV_DEV 0 /* emmc */
#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
/* Enable atags */
#define CONFIG_SYS_BOOTPARAMS_LEN (64*1024)
#define CONFIG_INITRD_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#endif
#endif #endif

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@ -10,12 +10,34 @@
#include <linux/sizes.h> #include <linux/sizes.h>
#include <configs/rk3036_common.h> #include <configs/rk3036_common.h>
/* Store env in emmc */
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_SYS_MMC_ENV_PART 0
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_SUPPORT_EMMC_RPMB
#ifndef CONFIG_SPL_BUILD #ifndef CONFIG_SPL_BUILD
/* Enable gpt partition table */
#undef CONFIG_PREBOOT
#define CONFIG_PREBOOT \
"mmc dev 0; " \
"gpt guid mmc 0; " \
"if test $? = 1; then " \
"fastboot usb 0; " \
"fi; "
#define CONFIG_SYS_BOOT_RAMDISK_HIGH
/* Store env in emmc */ /* Store env in emmc */
#define CONFIG_SYS_MMC_ENV_DEV 0 /* emmc */ #define CONFIG_SYS_MMC_ENV_DEV 0 /* emmc */
#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
/* Enable atags */
#define CONFIG_SYS_BOOTPARAMS_LEN (64*1024)
#define CONFIG_INITRD_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#endif #endif
#endif #endif

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@ -9,16 +9,23 @@
#include <asm/arch/hardware.h> #include <asm/arch/hardware.h>
#include "rockchip-common.h" #include "rockchip-common.h"
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_MALLOC_LEN (32 << 20) #define CONFIG_SYS_MALLOC_LEN (32 << 20)
#define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
#define CONFIG_SYS_TEXT_BASE 0x60000000 #define CONFIG_TINY_TPL
#define CONFIG_SYS_INIT_SP_ADDR 0x60100000 #define CONFIG_SPL_FRAMEWORK
#define CONFIG_SYS_LOAD_ADDR 0x60800800
#define CONFIG_SPL_STACK 0x10081fff #define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SPL_TEXT_BASE 0x10081000 #define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_TEXT_BASE 0x61000000
#define CONFIG_SYS_INIT_SP_ADDR 0x61100000
#define CONFIG_SYS_LOAD_ADDR 0x61800800
#define CONFIG_SPL_TEXT_BASE 0x60000000
#define CONFIG_TPL_STACK 0x10081fff
#define CONFIG_TPL_TEXT_BASE 0x10081000
#define CONFIG_ROCKCHIP_MAX_INIT_SIZE (4 << 10) #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (4 << 10)
#define CONFIG_ROCKCHIP_CHIP_TAG "RK30" #define CONFIG_ROCKCHIP_CHIP_TAG "RK30"
@ -28,7 +35,7 @@
#define CONFIG_BOUNCE_BUFFER #define CONFIG_BOUNCE_BUFFER
#define CONFIG_SYS_SDRAM_BASE 0x60000000 #define CONFIG_SYS_SDRAM_BASE 0x60000000
#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_NR_DRAM_BANKS 2
#define SDRAM_BANK_SIZE (512UL << 20UL) #define SDRAM_BANK_SIZE (512UL << 20UL)
#define SDRAM_MAX_SIZE (CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE) #define SDRAM_MAX_SIZE (CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE)