ARM: rockchip: rk1808 set gpio0_C2 to pull down

It's a long story to explain why to set gpio0_c2 to pull down, start
from ...

The rk1808 suspend supports to swith 32k clock source, BUT need the
low level for each source clock.

clk_32k  ---  ext_32k from pmic for example (pin on SoC is AWK13)
         |
	 ---  int_32k divided from 24MHz

The pin AWK13 default to be GPIO0_C2 which is normal state defaultly.

When the software try to switch clk_32k from int_32k to ext_32k, but
the pin is in normal state, unluckly for some board it's high level,
the result is the switch never be done, till device try to do suspend
and into a halt state.

Make the gpio0_c2 to be pull down as default state for kernel.

Change-Id: I6ae5859352d9a680166b4c711e25491a60442209
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

arch/arm/mach-rockchip/rk1808/rk1808.c

@@ -43,6 +43,7 @@ static struct mm_region rk1808_mem_map[] = {
 struct mm_region *mem_map = rk1808_mem_map;
 
 #define GRF_BASE	0xfe000000
+#define PMUGRF_BASE	0xfe020000
 
 enum {
 	GPIO4A3_SHIFT           = 12,
@@ -218,6 +219,11 @@ static int env_fixup_ramdisk_addr_r(void)
 
 int rk_board_init(void)
 {
+	struct rk1808_pmugrf * const pmugrf = (void *)PMUGRF_BASE;
+
+	/* Set GPIO0_C2 default to pull down from normal */
+	rk_clrsetreg(&pmugrf->gpio0c_p, 0x30, 0x20);
+
 #if defined(CONFIG_ROCKCHIP_SMCCC) && defined(CONFIG_ROCKCHIP_RK1806)
 	sip_smc_get_sip_version();
 #endif