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clk: rockchip: rk3399: support crypto clk set/get in SPL 

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I159d062320ca523e8dc4f0dcce94a619692481f3
This commit is contained in:
Joseph Chen 2020-10-17 17:10:53 +08:00 committed by Jianhong Chen
parent 9b6b8f53f4
commit c3723ef337
1 changed files with 2 additions and 4 deletions
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6
drivers/clk/rockchip/clk_rk3399.c
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@ -1002,7 +1002,6 @@ static ulong rk3399_tsadc_set_clk(struct rk3399_cru *cru, uint hz)
return rk3399_tsadc_get_clk(cru);
}
#ifndef CONFIG_SPL_BUILD
static ulong rk3399_crypto_get_clk(struct rk3399_clk_priv *priv, ulong clk_id)
{
struct rk3399_cru *cru = priv->cru;
@ -1060,6 +1059,7 @@ static ulong rk3399_crypto_set_clk(struct rk3399_clk_priv *priv, ulong clk_id,
return rk3399_crypto_get_clk(priv, clk_id);
}
#ifndef CONFIG_SPL_BUILD
static ulong rk3399_peri_get_clk(struct rk3399_clk_priv *priv, ulong clk_id)
{
struct rk3399_cru *cru = priv->cru;
@ -1184,11 +1184,11 @@ static ulong rk3399_clk_get_rate(struct clk *clk)
case SCLK_TSADC:
rate = rk3399_tsadc_get_clk(priv->cru);
break;
#ifndef CONFIG_SPL_BUILD
case SCLK_CRYPTO0:
case SCLK_CRYPTO1:
rate = rk3399_crypto_get_clk(priv, clk->id);
break;
#ifndef CONFIG_SPL_BUILD
case ACLK_PERIHP:
case HCLK_PERIHP:
case PCLK_PERIHP:
@ -1275,12 +1275,10 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
case SCLK_TSADC:
ret = rk3399_tsadc_set_clk(priv->cru, rate);
break;
#ifndef CONFIG_SPL_BUILD
case SCLK_CRYPTO0:
case SCLK_CRYPTO1:
ret = rk3399_crypto_set_clk(priv, clk->id, rate);
break;
#endif
default:
return -ENOENT;
}