From c2bb46e4a526f2e968b560da617bc29040eb79b0 Mon Sep 17 00:00:00 2001
From: shengfei Xu <xsf@rock-chips.com>
Date: Tue, 19 May 2020 10:47:38 +0800
Subject: [PATCH] irq: gicv3: Enables Group 1 interrupts for the current
 Security state

When a CPU enters a low power state, the registers ICC_IGRPEN1_EL1 is lost.
It need to re-initialise.

Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: I62d9eed2b29190134d95ebd153f21aa764c4ab3b
---
 drivers/irq/irq-gic.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/irq/irq-gic.c b/drivers/irq/irq-gic.c
index 43a1abcfdc..f8b8a0dc71 100644
--- a/drivers/irq/irq-gic.c
+++ b/drivers/irq/irq-gic.c
@@ -320,6 +320,11 @@ static int gic_irq_resume(void)
 	gicd_writel(gicd_save.ctlr, GICD_CTLR);
 	dsb();
 
+#if defined(CONFIG_GICV3)
+	asm volatile("msr " __stringify(ICC_IGRPEN1_EL1) ", %0" : : "r" (1));
+	dsb();
+#endif
+
 	return 0;
 }