irq: gicv3: Enables Group 1 interrupts for the current Security state

When a CPU enters a low power state, the registers ICC_IGRPEN1_EL1 is lost.
It need to re-initialise.

Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: I62d9eed2b29190134d95ebd153f21aa764c4ab3b

drivers/irq/irq-gic.c

@@ -320,6 +320,11 @@ static int gic_irq_resume(void)
 	gicd_writel(gicd_save.ctlr, GICD_CTLR);
 	dsb();
 
+#if defined(CONFIG_GICV3)
+	asm volatile("msr " __stringify(ICC_IGRPEN1_EL1) ", %0" : : "r" (1));
+	dsb();
+#endif
+
 	return 0;
 }