rockchip: rk3229: add gva som board support

gva-rk3229 is a som based board design for Android Things project.

Change-Id: I2e054407231a2549573d2302855c09b9795fdddd
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Kever Yang 2017-11-13 10:33:02 +08:00
parent a2be733b20
commit b4a5485919
9 changed files with 548 additions and 0 deletions

289
arch/arm/dts/rk3229-gva.dts Normal file
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/*
* Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/dts-v1/;
#include "rk322x.dtsi"
#include <dt-bindings/input/input.h>
/ {
model = "RK3229 GVA/Android Things Board V1.0";
compatible = "rockchip,rk3229-gva", "rockchip,rk3229";
memory@60000000 {
device_type = "memory";
reg = <0x60000000 0x40000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
trust_reserved: trust@0x68400000 {
reg = <0x68400000 0xe00000>;
no-map;
};
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rk805 1>;
clock-names = "ext_clock";
pinctrl-names = "default";
pinctrl-0 = <&wifi_enable_h>;
/*
* On the module itself this is one of these (depending
* on the actual card populated):
* - SDIO_RESET_L_WL_REG_ON
* - PDN (power down when low)
*/
reset-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; /* GPIO2_D2 */
};
vcc_host: vcc-host-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&host_vbus_drv>;
regulator-name = "vcc_host";
regulator-always-on;
regulator-boot-on;
};
wireless-bluetooth {
compatible = "bluetooth-platdata";
clocks = <&rk805 1>;
clock-names = "ext_clock";
uart_rts_gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
pinctrl-names = "default", "rts_gpio";
BT,reset_gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio3 27 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio3 26 GPIO_ACTIVE_HIGH>;
status = "okay";
};
wireless-wlan {
compatible = "wlan-platdata";
rockchip,grf = <&grf>;
wifi_chip_type = "ap6255";
WIFI,host_wake_irq = <&gpio0 28 GPIO_ACTIVE_HIGH>;
status = "okay";
};
gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
pinctrl-names = "default";
pinctrl-0 = <&pwr_key>;
power_key: power-key {
label = "GPIO Key Power";
gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
linux,code = <116>;
debounce-interval = <100>;
wakeup-source;
};
};
};
&i2c0 {
status = "okay";
rk805: rk805@18 {
compatible = "rockchip,rk805";
status = "okay";
reg = <0x18>;
interrupt-parent = <&gpio1>;
interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_int_l>;
rockchip,system-power-controller;
wakeup-source;
gpio-controller;
#gpio-cells = <2>;
#clock-cells = <1>;
clock-output-names = "xin32k", "rk805-clkout2";
rtc {
status = "okay";
};
pwrkey {
status = "okay";
};
gpio {
status = "okay";
};
regulators {
compatible = "rk805-regulator";
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
vdd_arm: RK805_DCDC1@0 {
regulator-compatible = "RK805_DCDC1";
regulator-name = "vdd_arm";
regulator-min-microvolt = <712500>;
regulator-max-microvolt = <1450000>;
regulator-initial-mode = <0x1>;
regulator-ramp-delay = <12500>;
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-mode = <0x2>;
regulator-on-in-suspend;
regulator-suspend-microvolt = <950000>;
};
};
vdd_logic: RK805_DCDC2@1 {
regulator-compatible = "RK805_DCDC2";
regulator-name = "vdd_logic";
regulator-min-microvolt = <712500>;
regulator-max-microvolt = <1450000>;
regulator-initial-mode = <0x1>;
regulator-ramp-delay = <12500>;
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-mode = <0x2>;
regulator-on-in-suspend;
regulator-suspend-microvolt = <1000000>;
};
};
vcc_ddr: RK805_DCDC3@2 {
regulator-compatible = "RK805_DCDC3";
regulator-name = "vcc_ddr";
regulator-initial-mode = <0x1>;
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-mode = <0x2>;
regulator-on-in-suspend;
};
};
vcc_io: RK805_DCDC4@3 {
regulator-compatible = "RK805_DCDC4";
regulator-name = "vcc_io";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-initial-mode = <0x1>;
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-mode = <0x2>;
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vcc_18: RK805_LDO1@4 {
regulator-compatible = "RK805_LDO1";
regulator-name = "vcc_18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vcc_18emmc: RK805_LDO2@5 {
regulator-compatible = "RK805_LDO2";
regulator-name = "vcc_18emmc";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vdd_10: RK805_LDO3@6 {
regulator-compatible = "RK805_LDO3";
regulator-name = "vdd_10";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1000000>;
};
};
};
};
};
&cpu0 {
cpu-supply = <&vdd_arm>;
};
&pinctrl {
pmic {
pmic_int_l: pmic-int-l {
rockchip,pins = <1 12 RK_FUNC_GPIO &pcfg_pull_up>; /* gpio1_b4 */
};
};
sdio-pwrseq {
wifi_enable_h: wifi-enable-h {
rockchip,pins = <2 26 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
host_vbus_drv: host-vbus-drv {
rockchip,pins = <3 20 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
keys {
pwr_key: pwr-key {
rockchip,pins = <3 23 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
&dmc {
rockchip,pctl-timing = <0x96 0xC8 0x1F3 0xF 0x8000004D 0x4 0x4E 0x6 0x3
0x0 0x6 0x5 0xC 0x10 0x6 0x4 0x4
0x5 0x4 0x200 0x3 0xA 0x40 0x0 0x1
0x5 0x5 0x3 0xC 0x1E 0x100 0x0 0x4
0x0 0x924>;
rockchip,phy-timing = <0x220 0x1 0x0 0x0 0x0 0x4 0x60>;
rockchip,sdram-params = <0x428B188 0x0 0x21 0x472 0x15
0 300 3 0 120>;
};
&emmc {
u-boot,dm-pre-reloc;
status = "okay";
};
&uart2 {
u-boot,dm-pre-reloc;
status = "okay";
};
&usb20_otg {
status = "okay";
};

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@ -4,6 +4,13 @@ config TARGET_EVB_RK3229
bool "EVB_RK3229"
select BOARD_LATE_INIT
config TARGET_GVA_RK3229
bool "GVA RK3229 board"
select BOARD_LATE_INIT
help
GVA RK3229 is a SOM and base-board combination based on RK3229. It
target for Google Voice Assistant with Android Things project.
config SYS_SOC
default "rockchip"
@ -14,5 +21,6 @@ config SPL_SERIAL_SUPPORT
default y
source "board/rockchip/evb_rk3229/Kconfig"
source "board/rockchip/gva_rk3229/Kconfig"
endif

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if TARGET_GVA_RK3229
config SYS_BOARD
default "gva_rk3229"
config SYS_VENDOR
default "rockchip"
config SYS_CONFIG_NAME
default "gva_rk3229"
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
endif

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EVB-RK3229
M: Kever Yang <kever.yang@rock-chips.com>
S: Maintained
F: board/rockchip/evb_rk3229
F: include/configs/evb_rk3229.h
F: configs/evb-rk3229_defconfig

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#
# (C) Copyright 2015 Google, Inc
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += evb_rk3229.o

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Get the Source and prebuild binary
==================================
> mkdir ~/evb_rk3229
> cd ~/evb_rk3229
> git clone git://git.denx.de/u-boot.git
> git clone https://github.com/OP-TEE/optee_os.git
> git clone https://github.com/rockchip-linux/rkbin.git
> git clone https://github.com/rockchip-linux/rkdeveloptool.git
Compile the OP-TEE
===============
> cd optee_os
> make clean
> make CROSS_COMPILE_ta_arm32=arm-none-eabi- PLATFORM=rockchip-rk322x
Get tee.bin in this step, copy it to U-Boot root dir:
> cp out/arm-plat-rockchip/core/tee-pager.bin ../u-boot/tee.bin
Compile the U-Boot
==================
> cd ../u-boot
> export CROSS_COMPILE=arm-linux-gnueabihf-
> export ARCH=arm
> make evb-rk3229_defconfig
> make
> make u-boot.itb
Get tpl/u-boot-tpl.bin, spl/u-boot-spl.bin and u-boot.itb in this step.
Compile the rkdeveloptool
=======================
Follow instructions in latest README
> cd ../rkflashtool
> autoreconf -i
> ./configure
> make
> sudo make install
Get rkdeveloptool in you Host in this step.
Both origin binaries and Tool are ready now, choose either option 1 or
option 2 to deploy U-Boot.
Package the image
=================
> cd ../u-boot
> tools/mkimage -n rk322x -T rksd -d tpl/u-boot-spl.bin idbloader.img
> cat spl/u-boot-spl.bin >> idbloader.img
Get idbloader.img in this step.
Flash the image to eMMC
=======================
Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
> cd ..
> rkdeveloptool db rkbin/rk32/rk322x_loader_v1.04.232.bin
> rkdeveloptool wl 64 u-boot/idbloader.img
> rkdeveloptool wl 0x4000 u-boot/u-boot.itb
> rkdeveloptool rd
Flash the image to SD card
==========================
> dd if=u-boot/idbloader.img of=/dev/sdb seek=64
> dd if=u-boot/u-boot.itb of=/dev/sdb seek=16384
You should be able to get U-Boot log message with OP-TEE boot info.
For more detail, please reference to:
http://opensource.rock-chips.com/wiki_Boot_option

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/*
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <dm.h>
#include <asm/io.h>
#include <asm/arch/uart.h>
DECLARE_GLOBAL_DATA_PTR;

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CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x800
CONFIG_ROCKCHIP_RK322X=y
CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds"
CONFIG_TPL_TEXT_BASE=0x10081004
CONFIG_TPL_MAX_SIZE=28672
CONFIG_TPL_STACK=0x10088000
CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
CONFIG_TARGET_EVB_RK3229=y
CONFIG_SPL_STACK_R_ADDR=0x60600000
CONFIG_DEFAULT_DEVICE_TREE="rk3229-gva"
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_SOURCE="board/rockchip/evb_rk3229/fit_spl_optee.its"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_ANDROID_BOOTLOADER=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_SPL_OPTEE_SUPPORT=y
CONFIG_FASTBOOT_BUF_SIZE=0x04000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPT=y
CONFIG_CMD_LOAD_ANDROID=y
CONFIG_CMD_BOOT_ANDROID=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_TPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_TPL_DM=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_TPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
CONFIG_TPL_SYSCON=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_TPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_ROCKCHIP_RK322X=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_TPL_RAM=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_BASE=0x11030000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_DWC2=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_G_DNL_MANUFACTURER="Rockchip"
CONFIG_G_DNL_VENDOR_NUM=0x18d1
CONFIG_G_DNL_PRODUCT_NUM=0xd00d
CONFIG_ERRNO_STR=y
CONFIG_AVB_LIBAVB=y
CONFIG_AVB_LIBAVB_AB=y
CONFIG_AVB_LIBAVB_ATX=y
CONFIG_AVB_LIBAVB_USER=y
CONFIG_OPTEE_CLIENT=y

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@ -0,0 +1,57 @@
/*
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIGS_GVA_RK3229_H
#define __CONFIGS_GVA_RK3229_H
#include <configs/rk322x_common.h>
/* Store env in emmc */
#undef CONFIG_ENV_SIZE
#define CONFIG_ENV_SIZE (32 << 10)
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_SYS_MMC_ENV_PART 0
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_SUPPORT_EMMC_RPMB
#ifndef CONFIG_SPL_BUILD
/* Enable gpt partition table */
#undef PARTS_DEFAULT
#define PARTS_DEFAULT \
"uuid_disk=${uuid_gpt_disk};" \
"name=loader_a,start=4M,size=4M,uuid=${uuid_gpt_loader};" \
"name=loader_b,size=4M,uuid=${uuid_gpt_reserved};" \
"name=trust_a,size=4M,uuid=${uuid_gpt_reserved};" \
"name=trust_b,size=4M,uuid=${uuid_gpt_reserved};" \
"name=misc,size=4M,uuid=${uuid_gpt_misc};" \
"name=metadata,size=16M,uuid=${uuid_gpt_metadata};" \
"name=boot_a,size=32M,uuid=${uuid_gpt_boot_a};" \
"name=boot_b,size=32M,uuid=${uuid_gpt_boot_b};" \
"name=system_a,size=512M,uuid=${uuid_gpt_system_a};" \
"name=system_b,size=512M,uuid=${uuid_gpt_system_b};" \
"name=vendor_a,size=50M,uuid=${uuid_gpt_vendor_a};" \
"name=vendor_b,size=50M,uuid=${uuid_gpt_vendor_b};" \
"name=cache,size=100M,uuid=${uuid_gpt_cache};" \
"name=persist,size=4M,uuid=${uuid_gpt_persist};" \
"name=userdata,size=-,uuid=${uuid_gpt_userdata};\0" \
#define CONFIG_PREBOOT
#define CONFIG_SYS_BOOT_RAMDISK_HIGH
#undef CONFIG_BOOTCOMMAND
#define CONFIG_BOOTCOMMAND \
"boot_android mmc 0:7 a;" \
/* Enable atags */
#define CONFIG_SYS_BOOTPARAMS_LEN (64*1024)
#define CONFIG_INITRD_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#endif
#endif