video/drm: lvds: Reverse sample clock direction on px30

Fix display corruption when vdd_log equals 0.95v.

Change-Id: I808a40ec7fdc2866f6b34a97ad77a7b1f9c01fd4
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
This commit is contained in:
Wyon Bi 2018-08-01 09:31:54 +08:00 committed by Jianhong Chen
parent 09e1ca4340
commit a60b58c4d9
2 changed files with 7 additions and 0 deletions

View File

@ -316,6 +316,9 @@ static void px30_output_lvds(struct display_state *state)
lvds_writel(lvds, MIPIPHY_REGE8, 0xfc);
lvds_msk_reg(lvds, MIPIPHY_REG8,
m_SAMPLE_CLK_DIR, v_SAMPLE_CLK_DIR_REVERSE);
/* set lvds mode and reset phy config */
lvds_msk_reg(lvds, MIPIPHY_REGE0,
m_MSB_SEL | m_DIG_INTER_RST,

View File

@ -187,6 +187,10 @@ enum {
#define MIPIPHY_REG4 0x0010
#define v_FBDIV_LSB(x) BITS_MASK(x, 0xff, 0)
#define MIPIPHY_REG8 0x0020
#define m_SAMPLE_CLK_DIR BIT(4)
#define v_SAMPLE_CLK_DIR_REVERSE BIT(4)
#define MIPIPHY_REGE0 0x0380
#define m_MSB_SEL BITS(1, 0)
#define m_DIG_INTER_RST BITS(1, 2)