From a60b58c4d9445f9f08bb77b3bca617d7b3833a69 Mon Sep 17 00:00:00 2001 From: Wyon Bi Date: Wed, 1 Aug 2018 09:31:54 +0800 Subject: [PATCH] video/drm: lvds: Reverse sample clock direction on px30 Fix display corruption when vdd_log equals 0.95v. Change-Id: I808a40ec7fdc2866f6b34a97ad77a7b1f9c01fd4 Signed-off-by: Wyon Bi --- drivers/video/drm/rockchip_lvds.c | 3 +++ drivers/video/drm/rockchip_lvds.h | 4 ++++ 2 files changed, 7 insertions(+) diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c index 4d221bdf5f..e02f8d3813 100644 --- a/drivers/video/drm/rockchip_lvds.c +++ b/drivers/video/drm/rockchip_lvds.c @@ -316,6 +316,9 @@ static void px30_output_lvds(struct display_state *state) lvds_writel(lvds, MIPIPHY_REGE8, 0xfc); + lvds_msk_reg(lvds, MIPIPHY_REG8, + m_SAMPLE_CLK_DIR, v_SAMPLE_CLK_DIR_REVERSE); + /* set lvds mode and reset phy config */ lvds_msk_reg(lvds, MIPIPHY_REGE0, m_MSB_SEL | m_DIG_INTER_RST, diff --git a/drivers/video/drm/rockchip_lvds.h b/drivers/video/drm/rockchip_lvds.h index a77db720e7..813b8288da 100644 --- a/drivers/video/drm/rockchip_lvds.h +++ b/drivers/video/drm/rockchip_lvds.h @@ -187,6 +187,10 @@ enum { #define MIPIPHY_REG4 0x0010 #define v_FBDIV_LSB(x) BITS_MASK(x, 0xff, 0) +#define MIPIPHY_REG8 0x0020 +#define m_SAMPLE_CLK_DIR BIT(4) +#define v_SAMPLE_CLK_DIR_REVERSE BIT(4) + #define MIPIPHY_REGE0 0x0380 #define m_MSB_SEL BITS(1, 0) #define m_DIG_INTER_RST BITS(1, 2)