From a3c5f2d549df9dbea25af195a8a262b508dbb5f0 Mon Sep 17 00:00:00 2001 From: Nickey Yang Date: Thu, 20 Aug 2020 09:48:53 +0800 Subject: [PATCH] video/drm: inno_mipi_phy: adjust timings for rv1126 According to the spec, phy version of rv1126 is the same as rk1808, LPX parameters need to be specified. Signed-off-by: Nickey Yang Change-Id: I75cf9db0b3763237727f3ebf3576929a3cb9cea8 --- drivers/video/drm/inno_mipi_phy.c | 70 +++++++++++++++++-------------- 1 file changed, 39 insertions(+), 31 deletions(-) diff --git a/drivers/video/drm/inno_mipi_phy.c b/drivers/video/drm/inno_mipi_phy.c index 5281513c35..0a056c802d 100644 --- a/drivers/video/drm/inno_mipi_phy.c +++ b/drivers/video/drm/inno_mipi_phy.c @@ -193,9 +193,10 @@ static const u32 lane_reg_offset[] = { [DATA_LANE_3] = INNO_DATA_LANE_3_REG_BASE, }; -#define FIXED_PARAM(_freq, _prepare, _clk_zero, _data_zero, _trail) \ +#define FIXED_PARAM(_freq, _lpx, _prepare, _clk_zero, _data_zero, _trail) \ { \ .max_freq = _freq, \ + .lpx = _lpx, \ .hs_prepare = _prepare, \ .clk_lane = { \ .hs_zero = _clk_zero, \ @@ -208,6 +209,7 @@ static const u32 lane_reg_offset[] = { struct fixed_param { unsigned int max_freq; + u8 lpx; u8 hs_prepare; struct { u8 hs_zero; @@ -219,35 +221,35 @@ struct fixed_param { }; static const struct fixed_param fixed_param_table[] = { - FIXED_PARAM(110, 0x20, 0x16, 0x02, 0x22), - FIXED_PARAM(150, 0x06, 0x16, 0x03, 0x45), - FIXED_PARAM(200, 0x18, 0x17, 0x04, 0x0b), - FIXED_PARAM(250, 0x05, 0x17, 0x05, 0x16), - FIXED_PARAM(300, 0x51, 0x18, 0x06, 0x2c), - FIXED_PARAM(400, 0x64, 0x19, 0x07, 0x33), - FIXED_PARAM(500, 0x20, 0x1b, 0x07, 0x4e), - FIXED_PARAM(600, 0x6a, 0x1d, 0x08, 0x3a), - FIXED_PARAM(700, 0x3e, 0x1e, 0x08, 0x6a), - FIXED_PARAM(800, 0x21, 0x1f, 0x09, 0x29), - FIXED_PARAM(1000, 0x09, 0x20, 0x09, 0x27) + FIXED_PARAM(110, 0x0, 0x20, 0x16, 0x02, 0x22), + FIXED_PARAM(150, 0x0, 0x06, 0x16, 0x03, 0x45), + FIXED_PARAM(200, 0x0, 0x18, 0x17, 0x04, 0x0b), + FIXED_PARAM(250, 0x0, 0x05, 0x17, 0x05, 0x16), + FIXED_PARAM(300, 0x0, 0x51, 0x18, 0x06, 0x2c), + FIXED_PARAM(400, 0x0, 0x64, 0x19, 0x07, 0x33), + FIXED_PARAM(500, 0x0, 0x20, 0x1b, 0x07, 0x4e), + FIXED_PARAM(600, 0x0, 0x6a, 0x1d, 0x08, 0x3a), + FIXED_PARAM(700, 0x0, 0x3e, 0x1e, 0x08, 0x6a), + FIXED_PARAM(800, 0x0, 0x21, 0x1f, 0x09, 0x29), + FIXED_PARAM(1000, 0x0, 0x09, 0x20, 0x09, 0x27) }; static const struct fixed_param rk1808_fixed_param_table[] = { - FIXED_PARAM(110, 0x7f, 0x16, 0x02, 0x02), - FIXED_PARAM(150, 0x7f, 0x16, 0x03, 0x02), - FIXED_PARAM(200, 0x7f, 0x17, 0x04, 0x02), - FIXED_PARAM(250, 0x7f, 0x17, 0x05, 0x04), - FIXED_PARAM(300, 0x7f, 0x18, 0x06, 0x04), - FIXED_PARAM(400, 0x7e, 0x19, 0x07, 0x04), - FIXED_PARAM(500, 0x7c, 0x1b, 0x07, 0x08), - FIXED_PARAM(600, 0x70, 0x1d, 0x08, 0x10), - FIXED_PARAM(700, 0x40, 0x1e, 0x08, 0x30), - FIXED_PARAM(800, 0x02, 0x1f, 0x09, 0x30), - FIXED_PARAM(1000, 0x08, 0x20, 0x09, 0x30), - FIXED_PARAM(1400, 0x03, 0x32, 0x14, 0x0f), - FIXED_PARAM(1600, 0x42, 0x36, 0x0e, 0x0f), - FIXED_PARAM(1800, 0x47, 0x7a, 0x0e, 0x0f), - FIXED_PARAM(2000, 0x64, 0x7a, 0x0e, 0x0b), + FIXED_PARAM(110, 0x02, 0x7f, 0x16, 0x02, 0x02), + FIXED_PARAM(150, 0x02, 0x7f, 0x16, 0x03, 0x02), + FIXED_PARAM(200, 0x02, 0x7f, 0x17, 0x04, 0x02), + FIXED_PARAM(250, 0x02, 0x7f, 0x17, 0x05, 0x04), + FIXED_PARAM(300, 0x02, 0x7f, 0x18, 0x06, 0x04), + FIXED_PARAM(400, 0x03, 0x7e, 0x19, 0x07, 0x04), + FIXED_PARAM(500, 0x03, 0x7c, 0x1b, 0x07, 0x08), + FIXED_PARAM(600, 0x03, 0x70, 0x1d, 0x08, 0x10), + FIXED_PARAM(700, 0x05, 0x40, 0x1e, 0x08, 0x30), + FIXED_PARAM(800, 0x05, 0x02, 0x1f, 0x09, 0x30), + FIXED_PARAM(1000, 0x05, 0x08, 0x20, 0x09, 0x30), + FIXED_PARAM(1400, 0x09, 0x03, 0x32, 0x14, 0x0f), + FIXED_PARAM(1600, 0x0d, 0x42, 0x36, 0x0e, 0x0f), + FIXED_PARAM(1800, 0x0e, 0x47, 0x7a, 0x0e, 0x0f), + FIXED_PARAM(2000, 0x11, 0x64, 0x7a, 0x0e, 0x0b), }; static inline void inno_write(struct inno_mipi_dphy *inno, u32 reg, u32 val) @@ -389,6 +391,9 @@ static void inno_mipi_dphy_get_fixed_param(struct inno_mipi_dphy_timing *t, t->hs_prepare = param->hs_prepare; t->hs_trail = param->hs_trail; + + if (soc_type == RK1808_MIPI_DPHY) + t->lpx = param->lpx; } static void inno_mipi_dphy_lane_timing_init(struct inno_mipi_dphy *inno, @@ -427,9 +432,12 @@ static void inno_mipi_dphy_lane_timing_init(struct inno_mipi_dphy *inno, data.clk_pre = DIV_ROUND_UP(timing.clkpre * txbyteclk, NSEC_PER_SEC); data.wakup_h = 0x3; data.wakup_l = 0xff; - data.lpx = DIV_ROUND_UP(txbyteclk * timing.lpx, NSEC_PER_SEC); - if (data.lpx > 2) - data.lpx -= 2; + + if (phy->soc_type == RV1108_MIPI_DPHY) { + data.lpx = DIV_ROUND_UP(txbyteclk * timing.lpx, NSEC_PER_SEC); + if (data.lpx > 2) + data.lpx -= 2; + } /* * Ttxclkesc * val >= Tta-go @@ -716,7 +724,7 @@ static const struct udevice_id inno_mipi_dphy_ids[] = { }, { .compatible = "rockchip,rv1126-mipi-dphy", - .data = (ulong)&inno_mipi_dphy_driver_data, + .data = (ulong)&rk1808_inno_mipi_dphy_driver_data, }, {} };