From a144d23d241817df9478019286ae5b45ec1bf3ed Mon Sep 17 00:00:00 2001 From: Andy Yan Date: Wed, 29 Apr 2020 14:58:58 +0800 Subject: [PATCH] drm/rockchip: vop: Add support for rv1126 Change-Id: I762158891605c1a87fd7d3a7c685052ab9125b31 Signed-off-by: Andy Yan --- drivers/video/drm/rockchip_crtc.c | 8 +++ drivers/video/drm/rockchip_crtc.h | 1 + drivers/video/drm/rockchip_vop.h | 1 + drivers/video/drm/rockchip_vop_reg.c | 89 ++++++++++++++++++++++++++++ drivers/video/drm/rockchip_vop_reg.h | 7 +++ 5 files changed, 106 insertions(+) diff --git a/drivers/video/drm/rockchip_crtc.c b/drivers/video/drm/rockchip_crtc.c index 6fec03a71c..bbc290040d 100644 --- a/drivers/video/drm/rockchip_crtc.c +++ b/drivers/video/drm/rockchip_crtc.c @@ -27,6 +27,11 @@ static const struct rockchip_crtc rv1108_vop_data = { .data = &rv1108_vop, }; +static const struct rockchip_crtc rv1126_vop_data = { + .funcs = &rockchip_vop_funcs, + .data = &rv1126_vop, +}; + static const struct rockchip_crtc px30_vop_lit_data = { .funcs = &rockchip_vop_funcs, .data = &px30_vop_lit, @@ -94,6 +99,9 @@ static const struct udevice_id rockchip_vop_ids[] = { }, { .compatible = "rockchip,rv1108-vop", .data = (ulong)&rv1108_vop_data, + }, { + .compatible = "rockchip,rv1126-vop", + .data = (ulong)&rv1126_vop_data, }, { .compatible = "rockchip,rk3126-vop", .data = (ulong)&rk3036_vop_data, diff --git a/drivers/video/drm/rockchip_crtc.h b/drivers/video/drm/rockchip_crtc.h index 544104575d..b584b45cf9 100644 --- a/drivers/video/drm/rockchip_crtc.h +++ b/drivers/video/drm/rockchip_crtc.h @@ -44,4 +44,5 @@ extern const struct vop_data rk3399_vop_lit; extern const struct vop_data rk322x_vop; extern const struct vop_data rk3328_vop; extern const struct vop_data rv1108_vop; +extern const struct vop_data rv1126_vop; #endif diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h index 9d2ff8afb0..09d6f9ac96 100644 --- a/drivers/video/drm/rockchip_vop.h +++ b/drivers/video/drm/rockchip_vop.h @@ -401,6 +401,7 @@ struct vop_scl_regs { struct vop_win { const struct vop_scl_regs *scl; + struct vop_reg gate; struct vop_reg enable; struct vop_reg format; struct vop_reg ymirror; diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c index 7ca84db23e..fd1ea24e65 100644 --- a/drivers/video/drm/rockchip_vop_reg.c +++ b/drivers/video/drm/rockchip_vop_reg.c @@ -710,3 +710,92 @@ const struct vop_data rv1108_vop = { .line_flag = &rk3366_vop_lite_line_flag, .reg_len = RK3366_LIT_FRC_LOWER01_0 * 4, }; + +static const struct vop_win rv1126_win2_data = { + .gate = VOP_REG(RV1126_WIN2_CTRL0, 0x1, 0), + .enable = VOP_REG(RV1126_WIN2_CTRL0, 0x1, 4), + .format = VOP_REG(RV1126_WIN2_CTRL0, 0x3, 5), + .rb_swap = VOP_REG(RV1126_WIN2_CTRL0, 0x1, 20), + .dsp_info = VOP_REG(RV1126_WIN2_DSP_INFO0, 0x0fff0fff, 0), + .dsp_st = VOP_REG(RV1126_WIN2_DSP_ST0, 0x1fff1fff, 0), + .yrgb_mst = VOP_REG(RV1126_WIN2_MST0, 0xffffffff, 0), + .yrgb_vir = VOP_REG(RV1126_WIN2_VIR0_1, 0x1fff, 0), +}; + +static const struct vop_ctrl rv1126_ctrl_data = { + .standby = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 1), + .axi_outstanding_max_num = VOP_REG(RK3366_LIT_SYS_CTRL1, 0x1f, 16), + .axi_max_outstanding_en = VOP_REG(RK3366_LIT_SYS_CTRL1, 0x1, 12), + .htotal_pw = VOP_REG(RK3366_LIT_DSP_HTOTAL_HS_END, 0x0fff0fff, 0), + .hact_st_end = VOP_REG(RK3366_LIT_DSP_HACT_ST_END, 0x0fff0fff, 0), + .vtotal_pw = VOP_REG(RK3366_LIT_DSP_VTOTAL_VS_END, 0x0fff0fff, 0), + .vact_st_end = VOP_REG(RK3366_LIT_DSP_VACT_ST_END, 0x0fff0fff, 0), + .vact_st_end_f1 = VOP_REG(RK3366_LIT_DSP_VACT_ST_END_F1, 0x0fff0fff, 0), + .vs_st_end_f1 = VOP_REG(RK3366_LIT_DSP_VS_ST_END_F1, 0x0fff0fff, 0), + .dsp_interlace = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 0), + .global_regdone_en = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 13), + .auto_gate_en = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 0), + .dsp_layer_sel = VOP_REG(RK3366_LIT_DSP_CTRL2, 0xff, 22), + .overlay_mode = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 4), + .core_dclk_div = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 13), + .dclk_ddr = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 14), + .rgb_en = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 0), + .rgb_pin_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x7, 2), + .hdmi_en = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 8), + .hdmi_pin_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x7, 10), + .lvds_en = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 16), + .lvds_pin_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x7, 18), + .mipi_en = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 24), + .mipi_pin_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x7, 26), + .mipi_dclk_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 25), + .lvds_dclk_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 17), + .hdmi_dclk_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 9), + .rgb_dclk_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 1), + .dither_down = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 8), + .dither_up = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 2), + .dsp_data_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1f, 9), + .dsp_ccir656_avg = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 5), + .dsp_black = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 15), + .dsp_blank = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 14), + .dsp_outzero = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 3), + .dsp_lut_en = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 5), + .out_mode = VOP_REG(RK3366_LIT_DSP_CTRL2, 0xf, 16), + .dsp_background = VOP_REG(RK3366_LIT_DSP_BG, 0x00ffffff, 0), + .cfg_done = VOP_REG(RK3366_LIT_REG_CFG_DONE, 0x1, 0), + + .bcsh_en = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 0), + .bcsh_r2y_csc_mode = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 1), + .bcsh_out_mode = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x3, 2), + .bcsh_y2r_csc_mode = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x3, 4), + .bcsh_y2r_en = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 6), + .bcsh_r2y_en = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 7), + .bcsh_color_bar = VOP_REG(RK3366_LIT_BCSH_COL_BAR, 0xffffff, 0), + .bcsh_brightness = VOP_REG(RK3366_LIT_BCSH_BCS, 0xff, 0), + .bcsh_contrast = VOP_REG(RK3366_LIT_BCSH_BCS, 0x1ff, 8), + .bcsh_sat_con = VOP_REG(RK3366_LIT_BCSH_BCS, 0x3ff, 20), + .bcsh_sin_hue = VOP_REG(RK3366_LIT_BCSH_H, 0x1ff, 0), + .bcsh_cos_hue = VOP_REG(RK3366_LIT_BCSH_H, 0x1ff, 16), + + .mcu_pix_total = VOP_REG(RK3366_LIT_MCU_CTRL, 0x3f, 0), + .mcu_cs_pst = VOP_REG(RK3366_LIT_MCU_CTRL, 0xf, 6), + .mcu_cs_pend = VOP_REG(RK3366_LIT_MCU_CTRL, 0x3f, 10), + .mcu_rw_pst = VOP_REG(RK3366_LIT_MCU_CTRL, 0xf, 16), + .mcu_rw_pend = VOP_REG(RK3366_LIT_MCU_CTRL, 0x3f, 20), + .mcu_clk_sel = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 26), + .mcu_hold_mode = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 27), + .mcu_frame_st = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 28), + .mcu_rs = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 29), + .mcu_bypass = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 30), + .mcu_type = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 31), + .mcu_rw_bypass_port = VOP_REG(RK3366_LIT_MCU_RW_BYPASS_PORT, + 0xffffffff, 0), +}; + +const struct vop_data rv1126_vop = { + .version = VOP_VERSION(2, 7), + .max_output = {1920, 1080}, + .ctrl = &rv1126_ctrl_data, + .win = &rv1126_win2_data, + .line_flag = &rk3366_vop_lite_line_flag, + .reg_len = RK3366_LIT_FLAG_REG * 4, +}; diff --git a/drivers/video/drm/rockchip_vop_reg.h b/drivers/video/drm/rockchip_vop_reg.h index 12052c6a71..c82d6adcab 100644 --- a/drivers/video/drm/rockchip_vop_reg.h +++ b/drivers/video/drm/rockchip_vop_reg.h @@ -965,4 +965,11 @@ #define RK1808_GRF_PD_VO_CON1 0x00000444 /* rk1808 register definition end*/ +/* RV1126 register definition start */ +#define RV1126_WIN2_CTRL0 0x0190 +#define RV1126_WIN2_VIR0_1 0x0198 +#define RV1126_WIN2_MST0 0x01a0 +#define RV1126_WIN2_DSP_INFO0 0x01a4 +#define RV1126_WIN2_DSP_ST0 0x01a8 +/* RV1126 register definition end */ #endif /* _ROCKCHIP_VOP_REG_H */