rockchip: rv1126: init QoS for ramboot
There is not SPL for ramboot, let's init QoS for it. Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: Ib6221122c44702cb4f287bad721316751478be71
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@ -535,7 +535,10 @@ void board_debug_uart_init(void)
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int arch_cpu_init(void)
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int arch_cpu_init(void)
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{
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{
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#ifdef CONFIG_SPL_BUILD
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/*
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* CONFIG_DM_RAMDISK: for ramboot that without SPL.
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*/
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#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_DM_RAMDISK)
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int delay;
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int delay;
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/* write BOOT_WATCHDOG to boot mode register, if reset by wdt */
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/* write BOOT_WATCHDOG to boot mode register, if reset by wdt */
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@ -545,8 +548,13 @@ int arch_cpu_init(void)
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writel(WDT_RESET_SRC_CLR, PMUGRF_RSTFUNC_CLR);
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writel(WDT_RESET_SRC_CLR, PMUGRF_RSTFUNC_CLR);
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}
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}
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/* Just set region 0 to unsecure */
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#ifdef CONFIG_SPL_BUILD
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/*
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* Just set region 0 to unsecure.
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* (Note: only secure-world can access this register)
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*/
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writel(0, FIREWALL_APB_BASE + FW_DDR_CON_REG);
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writel(0, FIREWALL_APB_BASE + FW_DDR_CON_REG);
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#endif
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/* disable force jtag mux route to both group0 and group1 */
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/* disable force jtag mux route to both group0 and group1 */
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writel(0x00300000, GRF_IOFUNC_CON3);
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writel(0x00300000, GRF_IOFUNC_CON3);
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@ -668,6 +676,7 @@ int arch_cpu_init(void)
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/* hold pmugrf's io reset */
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/* hold pmugrf's io reset */
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writel(0x1 << 7 | 1 << 23, PMUGRF_SOC_CON1);
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writel(0x1 << 7 | 1 << 23, PMUGRF_SOC_CON1);
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#endif
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#endif
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#if defined(CONFIG_ROCKCHIP_SFC) && (defined(CONFIG_SPL_BUILD) || defined(CONFIG_SUPPORT_USBPLUG))
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#if defined(CONFIG_ROCKCHIP_SFC) && (defined(CONFIG_SPL_BUILD) || defined(CONFIG_SUPPORT_USBPLUG))
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/* GPIO0_D6 pull down in default, pull up it for SPI Flash */
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/* GPIO0_D6 pull down in default, pull up it for SPI Flash */
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writel(((0x3 << 12) << 16) | (0x1 << 12), GRF1_GPIO0D_P);
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writel(((0x3 << 12) << 16) | (0x1 << 12), GRF1_GPIO0D_P);
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