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rockchip: rk3308: enable spl build 

As rk3308 is a aarch64 based soc, we only let
it run spl on aarch64 excution state. But for
u-boot stage, it may run on aarch32 or aarch64
state.

Change-Id: I592375aef19a35f10555f7c5b991445cf02c4543
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
This commit is contained in:
Andy Yan 2019-03-01 11:13:48 +08:00 committed by Joseph Chen
parent 4807f529b8
commit 951488b02b
5 changed files with 37 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
arch/arm/mach-rockchip/Kconfig
View File

@ -215,6 +215,17 @@ config ROCKCHIP_RK3308
select DEBUG_UART_BOARD_INIT
select ARM_SMCCC
select GICV2
select SUPPORT_SPL if !ARM64_BOOT_AARCH32
select SUPPORT_TPL if !ARM64_BOOT_AARCH32
select SPL if !ARM64_BOOT_AARCH32
select TPL if !ARM64_BOOT_AARCH32
imply SPL_CLK
imply SPL_REGMAP
imply SPL_SYSCON
imply SPL_RAM
imply SPL_SERIAL_SUPPORT
imply TPL_SERIAL_SUPPORT
imply SPL_SEPARATE_BSS
help
The Rockchip RK3308 is a ARM-based Soc which embeded with quad
Cortex-A35 and highly integrated audio interfaces.

9
configs/evb-rk3308_defconfig
View File

@ -1,11 +1,16 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3308=y
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
CONFIG_RKIMG_BOOTLOADER=y
CONFIG_ROCKCHIP_VENDOR_PARTITION=y
# CONFIG_USING_KERNEL_DTB is not set
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_TARGET_EVB_RK3308=y
CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
CONFIG_DEBUG_UART=y
@ -17,6 +22,7 @@ CONFIG_BOOTDELAY=0
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_ANDROID_BOOTLOADER=y
CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
# CONFIG_FASTBOOT is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
@ -38,8 +44,11 @@ CONFIG_CMD_MMC=y
# CONFIG_DOS_PARTITION is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
CONFIG_SPL_OF_CONTROL=y
CONFIG_TPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_TPL_DM=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CLK=y

13
configs/rk3308_defconfig
View File

@ -1,10 +1,15 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3308=y
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
CONFIG_RKIMG_BOOTLOADER=y
CONFIG_ROCKCHIP_VENDOR_PARTITION=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_TARGET_EVB_RK3308=y
CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
CONFIG_DEBUG_UART=y
@ -16,6 +21,7 @@ CONFIG_BOOTDELAY=0
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_ANDROID_BOOTLOADER=y
CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
# CONFIG_FASTBOOT is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
@ -38,8 +44,11 @@ CONFIG_CMD_MMC=y
CONFIG_CMD_PMIC=y
# CONFIG_ISO_PARTITION is not set
CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
CONFIG_SPL_OF_CONTROL=y
CONFIG_TPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_TPL_DM=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CLK=y
@ -52,11 +61,11 @@ CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_PHY=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PHY=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PINCTRL=y
CONFIG_DM_FUEL_GAUGE=y
CONFIG_POWER_FG_RK816=y

2
include/configs/evb_rk3308.h
View File

@ -19,7 +19,9 @@
#undef CONFIG_CONSOLE_SCROLL_LINES
#define CONFIG_CONSOLE_SCROLL_LINES 10
#ifndef CONFIG_SPL_BUILD
#undef CONFIG_BOOTCOMMAND
#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
#endif
#endif

4
include/configs/rk3308_common.h
View File

@ -14,6 +14,10 @@
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE 0x00000000
#define CONFIG_SPL_MAX_SIZE 0x20000
#define CONFIG_SPL_BSS_START_ADDR 0x00400000
#define CONFIG_SPL_BSS_MAX_SIZE 0x2000
#define CONFIG_SYS_NS16550_MEM32