qiurui
/
rv1126-uboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

ARM: dts: rk1808-evb: Add gmac support at dts level 

Note that the gmac status is disabled.

Change-Id: Ifac56c5d5c1cc10d5f2882fbfd1ef02d97299127
Signed-off-by: David Wu <david.wu@rock-chips.com>
This commit is contained in:
David Wu 2019-04-10 10:01:18 +08:00 committed by Jianhong Chen
parent 4dad63273a
commit 860893596c
2 changed files with 36 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
arch/arm/dts/rk1808-evb.dts
View File

@ -7,6 +7,7 @@
/dts-v1/; /dts-v1/;
#include "rk1808.dtsi" #include "rk1808.dtsi"
#include "rk1808-u-boot.dtsi" #include "rk1808-u-boot.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h> #include <dt-bindings/input/input.h>
#include <linux/media-bus-format.h> #include <linux/media-bus-format.h>
@ -30,6 +31,13 @@
press-threshold-microvolt = <10000>; press-threshold-microvolt = <10000>;
}; };
}; };
vcc_phy: vcc-phy-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_phy";
regulator-always-on;
regulator-boot-on;
};
}; };
&emmc { &emmc {
@ -44,6 +52,21 @@
status = "okay"; status = "okay";
}; };
&gmac {
phy-supply = <&vcc_phy>;
phy-mode = "rgmii";
clock_in_out = "input";
snps,reset-gpio = <&gpio0 10 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */
snps,reset-delays-us = <0 20000 100000>;
assigned-clocks = <&cru SCLK_GMAC>;
assigned-clock-parents = <&gmac_clkin>;
tx_delay = <0x50>;
rx_delay = <0x3a>;
status = "disabled";
};
&uart2 { &uart2 {
clock-frequency = <24000000>; clock-frequency = <24000000>;
status = "okay"; status = "okay";

26
arch/arm/dts/rk1808.dtsi
View File

@ -1302,11 +1302,11 @@
rgmii_pins: rgmii-pins { rgmii_pins: rgmii-pins {
rockchip,pins = rockchip,pins =
/* rgmii_txen */ /* rgmii_txen */
<2 RK_PA1 2 &pcfg_pull_none_12ma>, <2 RK_PA1 2 &pcfg_pull_none_4ma>,
/* rgmii_txd1 */ /* rgmii_txd1 */
<2 RK_PA2 2 &pcfg_pull_none_12ma>, <2 RK_PA2 2 &pcfg_pull_none_4ma>,
/* rgmii_txd0 */ /* rgmii_txd0 */
<2 RK_PA3 2 &pcfg_pull_none_12ma>, <2 RK_PA3 2 &pcfg_pull_none_4ma>,
/* rgmii_rxd0 */ /* rgmii_rxd0 */
<2 RK_PA4 2 &pcfg_pull_none>, <2 RK_PA4 2 &pcfg_pull_none>,
/* rgmii_rxd1 */ /* rgmii_rxd1 */
@ -1314,13 +1314,13 @@
/* rgmii_rxdv */ /* rgmii_rxdv */
<2 RK_PA7 2 &pcfg_pull_none>, <2 RK_PA7 2 &pcfg_pull_none>,
/* rgmii_mdio */ /* rgmii_mdio */
<2 RK_PB0 2 &pcfg_pull_none>, <2 RK_PB0 2 &pcfg_pull_none_2ma>,
/* rgmii_mdc */ /* rgmii_mdc */
<2 RK_PB2 2 &pcfg_pull_none>, <2 RK_PB2 2 &pcfg_pull_none_2ma>,
/* rgmii_txd3 */ /* rgmii_txd3 */
<2 RK_PB3 2 &pcfg_pull_none_12ma>, <2 RK_PB3 2 &pcfg_pull_none_4ma>,
/* rgmii_txd2 */ /* rgmii_txd2 */
<2 RK_PB4 2 &pcfg_pull_none_12ma>, <2 RK_PB4 2 &pcfg_pull_none_4ma>,
/* rgmii_rxd2 */ /* rgmii_rxd2 */
<2 RK_PB5 2 &pcfg_pull_none>, <2 RK_PB5 2 &pcfg_pull_none>,
/* rgmii_rxd3 */ /* rgmii_rxd3 */
@ -1328,7 +1328,7 @@
/* rgmii_clk */ /* rgmii_clk */
<2 RK_PB7 2 &pcfg_pull_none>, <2 RK_PB7 2 &pcfg_pull_none>,
/* rgmii_txclk */ /* rgmii_txclk */
<2 RK_PC1 2 &pcfg_pull_none_12ma>, <2 RK_PC1 2 &pcfg_pull_none_4ma>,
/* rgmii_rxclk */ /* rgmii_rxclk */
<2 RK_PC2 2 &pcfg_pull_none>; <2 RK_PC2 2 &pcfg_pull_none>;
}; };
@ -1336,11 +1336,11 @@
rmii_pins: rmii-pins { rmii_pins: rmii-pins {
rockchip,pins = rockchip,pins =
/* rmii_txen */ /* rmii_txen */
<2 RK_PA1 2 &pcfg_pull_none_12ma>, <2 RK_PA1 2 &pcfg_pull_none_4ma>,
/* rmii_txd1 */ /* rmii_txd1 */
<2 RK_PA2 2 &pcfg_pull_none_12ma>, <2 RK_PA2 2 &pcfg_pull_none_4ma>,
/* rmii_txd0 */ /* rmii_txd0 */
<2 RK_PA3 2 &pcfg_pull_none_12ma>, <2 RK_PA3 2 &pcfg_pull_none_4ma>,
/* rmii_rxd0 */ /* rmii_rxd0 */
<2 RK_PA4 2 &pcfg_pull_none>, <2 RK_PA4 2 &pcfg_pull_none>,
/* rmii_rxd1 */ /* rmii_rxd1 */
@ -1350,9 +1350,9 @@
/* rmii_rxdv */ /* rmii_rxdv */
<2 RK_PA7 2 &pcfg_pull_none>, <2 RK_PA7 2 &pcfg_pull_none>,
/* rmii_mdio */ /* rmii_mdio */
<2 RK_PB0 2 &pcfg_pull_none>, <2 RK_PB0 2 &pcfg_pull_none_2ma>,
/* rmii_mdc */ /* rmii_mdc */
<2 RK_PB2 2 &pcfg_pull_none>, <2 RK_PB2 2 &pcfg_pull_none_2ma>,
/* rmii_clk */ /* rmii_clk */
<2 RK_PB7 2 &pcfg_pull_none>; <2 RK_PB7 2 &pcfg_pull_none>;
}; };