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drm/rockchip: hdmi: Support RK3568 dw-hdmi 

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I3c9275a44c519c3927ea7199147a738d4c2a1334
This commit is contained in:
Algea Cao 2020-12-29 09:29:36 +08:00 committed by Jianhong Chen
parent 10ee9f5b51
commit 5ccad8f6bf
3 changed files with 55 additions and 15 deletions
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42
drivers/video/drm/dw_hdmi.c
View File

@ -772,9 +772,6 @@ int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
dw_hdmi_phy_i2c_write(hdmi, phy_config->vlev_ctr,
HDMI_3D_TX_PHY_VLEVCTRL);
/* Override and disable clock termination. */
dw_hdmi_phy_i2c_write(hdmi, HDMI_3D_TX_PHY_CKCALCTRL_OVERRIDE,
HDMI_3D_TX_PHY_CKCALCTRL);
return 0;
}
@ -1525,12 +1522,6 @@ static void hdmi_video_sample(struct dw_hdmi *hdmi)
hdmi_writeb(hdmi, 0x0, HDMI_TX_BCBDATA1);
}
static void hdmi_enable_overflow_interrupts(struct dw_hdmi *hdmi)
{
hdmi_writeb(hdmi, 0, HDMI_FC_MASK2);
hdmi_writeb(hdmi, 0, HDMI_IH_MUTE_FC_STAT2);
}
static void dw_hdmi_disable(struct dw_hdmi *hdmi, struct display_state *state)
{
if (hdmi->phy.enabled) {
@ -2048,10 +2039,10 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi,
if (hdmi->plat_data->get_enc_out_encoding)
hdmi->hdmi_data.enc_out_encoding =
hdmi->plat_data->get_enc_out_encoding(data);
else if ((hdmi->vic == 6) || (hdmi->vic == 7) ||
(hdmi->vic == 21) || (hdmi->vic == 22) ||
(hdmi->vic == 2) || (hdmi->vic == 3) ||
(hdmi->vic == 17) || (hdmi->vic == 18))
else if (hdmi->vic == 6 || hdmi->vic == 7 ||
hdmi->vic == 21 || hdmi->vic == 22 ||
hdmi->vic == 2 || hdmi->vic == 3 ||
hdmi->vic == 17 || hdmi->vic == 18)
hdmi->hdmi_data.enc_out_encoding = V4L2_YCBCR_ENC_601;
else
hdmi->hdmi_data.enc_out_encoding = V4L2_YCBCR_ENC_709;
@ -2129,8 +2120,6 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi,
hdmi_video_sample(hdmi);
hdmi_tx_hdcp_config(hdmi, mode);
dw_hdmi_clear_overflow(hdmi);
if (hdmi->cable_plugin && hdmi->sink_is_hdmi)
hdmi_enable_overflow_interrupts(hdmi);
return 0;
}
@ -2163,6 +2152,9 @@ static int dw_hdmi_set_reg_wr(struct dw_hdmi *hdmi)
static void initialize_hdmi_mutes(struct dw_hdmi *hdmi)
{
/*mute unnecessary interrupt, only enable hpd */
hdmi_writeb(hdmi, 0xff, HDMI_FC_MASK0);
hdmi_writeb(hdmi, 0xff, HDMI_FC_MASK1);
hdmi_writeb(hdmi, 0xff, HDMI_FC_MASK2);
hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT0);
hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT1);
hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT2);
@ -2338,6 +2330,7 @@ int rockchip_dw_hdmi_init(struct display_state *state)
dw_hdmi_i2c_init(hdmi);
conn_state->type = DRM_MODE_CONNECTOR_HDMIA;
conn_state->output_if |= VOP_OUTPUT_IF_HDMI0;
conn_state->output_mode = ROCKCHIP_OUT_MODE_AAAA;
hdmi->dev_type = pdata->dev_type;
@ -2405,6 +2398,7 @@ int rockchip_dw_hdmi_get_timing(struct display_state *state)
struct dw_hdmi *hdmi = conn_state->private;
struct edid *edid = (struct edid *)conn_state->edid;
unsigned int bus_format;
unsigned long enc_out_encoding;
struct overscan *overscan = &conn_state->overscan;
const u8 def_modes_vic[6] = {4, 16, 2, 17, 31, 19};
@ -2412,6 +2406,7 @@ int rockchip_dw_hdmi_get_timing(struct display_state *state)
return -EFAULT;
ret = drm_do_get_edid(&hdmi->adap, conn_state->edid);
if (!ret) {
hdmi->sink_is_hdmi =
drm_detect_hdmi_monitor(edid);
@ -2469,6 +2464,23 @@ int rockchip_dw_hdmi_get_timing(struct display_state *state)
break;
}
if (hdmi->vic == 6 || hdmi->vic == 7 || hdmi->vic == 21 ||
hdmi->vic == 22 || hdmi->vic == 2 || hdmi->vic == 3 ||
hdmi->vic == 17 || hdmi->vic == 18)
enc_out_encoding = V4L2_YCBCR_ENC_601;
else
enc_out_encoding = V4L2_YCBCR_ENC_709;
if (enc_out_encoding == V4L2_YCBCR_ENC_BT2020)
conn_state->color_space = V4L2_COLORSPACE_BT2020;
else if (bus_format == MEDIA_BUS_FMT_RGB888_1X24 ||
bus_format == MEDIA_BUS_FMT_RGB101010_1X30)
conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
else if (enc_out_encoding == V4L2_YCBCR_ENC_709)
conn_state->color_space = V4L2_COLORSPACE_REC709;
else
conn_state->color_space = V4L2_COLORSPACE_SMPTE170M;
return 0;
}

27
drivers/video/drm/rockchip_dw_hdmi.c
View File

@ -35,6 +35,10 @@
#define RK3328_GRF_SOC_CON3 0x040c
#define RK3328_GRF_SOC_CON4 0x0410
#define RK3568_GRF_VO_CON1 0x0364
#define RK3568_HDMI_SDAIN_MSK ((1 << 15) | (1 << (15 + 16)))
#define RK3568_HDMI_SCLIN_MSK ((1 << 14) | (1 << (14 + 16)))
static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = {
{
30666000, {
@ -178,6 +182,7 @@ static const struct dw_hdmi_phy_config rockchip_phy_config[] = {
{ 165000000, 0x802b, 0x0004, 0x0209},
{ 297000000, 0x8039, 0x0005, 0x028d},
{ 594000000, 0x8039, 0x0000, 0x019d},
{ ~0UL, 0x0000, 0x0000, 0x0000},
{ ~0UL, 0x0000, 0x0000, 0x0000}
};
@ -423,6 +428,10 @@ void dw_hdmi_set_iomux(void *grf, int dev_type)
writel(RK3228_IO_3V_DOMAIN, grf + RK3228_GRF_SOC_CON6);
writel(RK3228_IO_DDC_IN_MSK, grf + RK3228_GRF_SOC_CON2);
break;
case RK3568_HDMI:
writel(RK3568_HDMI_SDAIN_MSK | RK3568_HDMI_SCLIN_MSK,
grf + RK3568_GRF_VO_CON1);
break;
default:
break;
}
@ -489,11 +498,26 @@ const struct dw_hdmi_plat_data rk3399_hdmi_drv_data = {
.dev_type = RK3399_HDMI,
};
const struct dw_hdmi_plat_data rk3568_hdmi_drv_data = {
.vop_sel_bit = 0,
.grf_vop_sel_reg = 0,
.mpll_cfg = rockchip_mpll_cfg,
.cur_ctr = rockchip_cur_ctr,
.phy_config = rockchip_phy_config,
.mpll_cfg_420 = rockchip_mpll_cfg_420,
.dev_type = RK3568_HDMI,
};
static int rockchip_dw_hdmi_probe(struct udevice *dev)
{
return 0;
}
static const struct rockchip_connector rk3568_dw_hdmi_data = {
.funcs = &rockchip_dw_hdmi_funcs,
.data = &rk3568_hdmi_drv_data,
};
static const struct rockchip_connector rk3399_dw_hdmi_data = {
.funcs = &rockchip_dw_hdmi_funcs,
.data = &rk3399_hdmi_drv_data,
@ -521,6 +545,9 @@ static const struct rockchip_connector rk3228_dw_hdmi_data = {
static const struct udevice_id rockchip_dw_hdmi_ids[] = {
{
.compatible = "rockchip,rk3568-dw-hdmi",
.data = (ulong)&rk3568_dw_hdmi_data,
}, {
.compatible = "rockchip,rk3399-dw-hdmi",
.data = (ulong)&rk3399_dw_hdmi_data,
}, {

1
include/linux/dw_hdmi.h
View File

@ -92,6 +92,7 @@ enum dw_hdmi_devtype {
RK3366_HDMI,
RK3368_HDMI,
RK3399_HDMI,
RK3568_HDMI,
};
struct dw_hdmi_audio_tmds_n {