qiurui
/
rv1126-uboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mpc85xx: clean up the old deep sleep framework 

All the boards that support deep sleep feature are converted
to deep sleep generic board interface. The old interface which
support non-generic board is not used anymore. So clean it up.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This commit is contained in:
tang yuantian 2014-12-18 10:26:34 +08:00 committed by York Sun
parent 7d0e97a294
commit 59d34ed022
2 changed files with 1 additions and 30 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
arch/powerpc/cpu/mpc85xx/cpu_init.c
View File

@ -424,7 +424,6 @@ void fsl_erratum_a007212_workaround(void)
ulong cpu_init_f(void) ulong cpu_init_f(void)
{ {
ulong flag = 0;
extern void m8560_cpm_reset (void); extern void m8560_cpm_reset (void);
#if defined(CONFIG_SYS_DCSRBAR_PHYS) || \ #if defined(CONFIG_SYS_DCSRBAR_PHYS) || \
(defined(CONFIG_SECURE_BOOT) && defined(CONFIG_FSL_CORENET)) (defined(CONFIG_SECURE_BOOT) && defined(CONFIG_FSL_CORENET))
@ -499,18 +498,11 @@ ulong cpu_init_f(void)
in_be32(&gur->dcsrcr); in_be32(&gur->dcsrcr);
#endif #endif
#ifdef CONFIG_SYS_DCSRBAR_PHYS
#ifdef CONFIG_DEEP_SLEEP
/* disable the console if boot from deep sleep */
if (in_be32(&gur->scrtsr[0]) & (1 << 3))
flag = GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE;
#endif
#endif
#ifdef CONFIG_SYS_FSL_ERRATUM_A007212 #ifdef CONFIG_SYS_FSL_ERRATUM_A007212
fsl_erratum_a007212_workaround(); fsl_erratum_a007212_workaround();
#endif #endif
return flag; return 0;
} }
/* Implement a dummy function for those platforms w/o SERDES */ /* Implement a dummy function for those platforms w/o SERDES */

21
arch/powerpc/lib/board.c
View File

@ -346,13 +346,6 @@ void board_init_f(ulong bootflag)
#ifdef CONFIG_PRAM #ifdef CONFIG_PRAM
ulong reg; ulong reg;
#endif #endif
#ifdef CONFIG_DEEP_SLEEP
const ccsr_gur_t *gur = (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
struct ccsr_scfg *scfg = (void *)CONFIG_SYS_MPC85xx_SCFG;
u32 start_addr;
typedef void (*func_t)(void);
func_t kernel_resume;
#endif
/* Pointer is writable since we allocated a register for it */ /* Pointer is writable since we allocated a register for it */
gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
@ -372,20 +365,6 @@ void board_init_f(ulong bootflag)
if ((*init_fnc_ptr) () != 0) if ((*init_fnc_ptr) () != 0)
hang(); hang();
#ifdef CONFIG_DEEP_SLEEP
/* Jump to kernel in deep sleep case */
if (in_be32(&gur->scrtsr[0]) & (1 << 3)) {
l2cache_init();
#if defined(CONFIG_RAMBOOT_PBL)
disable_cpc_sram();
#endif
enable_cpc();
start_addr = in_be32(&scfg->sparecr[1]);
kernel_resume = (func_t)start_addr;
kernel_resume();
}
#endif
#ifdef CONFIG_POST #ifdef CONFIG_POST
post_bootmode_init(); post_bootmode_init();
post_run(NULL, POST_ROM | post_bootmode_get(NULL)); post_run(NULL, POST_ROM | post_bootmode_get(NULL));