From 52f7b21d4bf4e380d25ecb170591495f0f6f01b3 Mon Sep 17 00:00:00 2001 From: Zhihuan He Date: Thu, 1 Feb 2018 15:40:55 +0800 Subject: [PATCH] rockchip: Add RV1108 SPL support add rv1108 spl support so we can load u-boot from SPL Change-Id: I9d36cd590a22d26a46dd84bc3ee0c761048f7b01 Signed-off-by: Zhihuan He --- arch/arm/mach-rockchip/Kconfig | 2 ++ arch/arm/mach-rockchip/rv1108/clk_rv1108.c | 4 +++ arch/arm/mach-rockchip/rv1108/rv1108.c | 33 ++++++++++++++++++++-- arch/arm/mach-rockchip/sdram_common.c | 4 +++ arch/arm/mach-rockchip/spl.c | 1 + configs/evb-rv1108_defconfig | 14 +++++++++ include/configs/rv1108_common.h | 9 ++++++ 7 files changed, 64 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 9e55d01bd0..7328ba467e 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -214,6 +214,8 @@ config ROCKCHIP_RK3399 config ROCKCHIP_RV1108 bool "Support Rockchip RV1108" select CPU_V7 + select SUPPORT_SPL + select SPL help The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7 and a DSP. diff --git a/arch/arm/mach-rockchip/rv1108/clk_rv1108.c b/arch/arm/mach-rockchip/rv1108/clk_rv1108.c index 968c356447..f65225a661 100644 --- a/arch/arm/mach-rockchip/rv1108/clk_rv1108.c +++ b/arch/arm/mach-rockchip/rv1108/clk_rv1108.c @@ -12,8 +12,12 @@ int rockchip_get_clk(struct udevice **devp) { +#ifndef CONFIG_SPL_BUILD return uclass_get_device_by_driver(UCLASS_CLK, DM_GET_DRIVER(clk_rv1108), devp); +#else + return -1; +#endif } void *rockchip_get_cru(void) diff --git a/arch/arm/mach-rockchip/rv1108/rv1108.c b/arch/arm/mach-rockchip/rv1108/rv1108.c index 3b6b21d4f9..8a1d7cd8a3 100644 --- a/arch/arm/mach-rockchip/rv1108/rv1108.c +++ b/arch/arm/mach-rockchip/rv1108/rv1108.c @@ -1,7 +1,34 @@ /* - * (C) Copyright 2016 Rockchip Electronics Co., Ltd - * Author: Andy Yan - * SPDX-License-Identifier: GPL-2.0+ + * Copyright (C) 2018 Rockchip Electronics Co., Ltd + * Author: Zhihuan He + * SPDX-License-Identifier: GPL-2.0+ */ #include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define GRF_BASE 0x10300000 + +void board_debug_uart_init(void) +{ +#ifdef CONFIG_SPL_BUILD + struct rv1108_grf *grf = (void *)GRF_BASE; + +#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0x10230000) + rk_clrsetreg(&grf->gpio3a_iomux, /* UART0 */ + GPIO3A6_MASK | GPIO3A5_MASK, + GPIO3A6_UART1_SOUT << GPIO3A6_SHIFT | + GPIO3A5_UART1_SIN << GPIO3A5_SHIFT); +#else + rk_clrsetreg(&grf->gpio2d_iomux, /* UART2 */ + GPIO2D2_MASK | GPIO2D1_MASK, + GPIO2D2_UART2_SOUT_M0 << GPIO2D2_SHIFT | + GPIO2D1_UART2_SIN_M0 << GPIO2D1_SHIFT); +#endif +#endif /*CONFIG_SPL_BUILD*/ +} + diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c index b1528dfd4e..cb7459e80e 100644 --- a/arch/arm/mach-rockchip/sdram_common.c +++ b/arch/arm/mach-rockchip/sdram_common.c @@ -40,6 +40,7 @@ struct tos_parameter_t { s64 reserve[8]; }; +#if defined(CONFIG_SPL_FRAMEWORK) || !defined(CONFIG_SPL_OF_PLATDATA) int dram_init_banksize(void) { size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE), @@ -66,6 +67,7 @@ int dram_init_banksize(void) return 0; } +#endif size_t rockchip_sdram_size(phys_addr_t reg) { @@ -107,6 +109,7 @@ size_t rockchip_sdram_size(phys_addr_t reg) return (size_t)size_mb << 20; } +#if defined(CONFIG_SPL_FRAMEWORK) || !defined(CONFIG_SPL_OF_PLATDATA) int dram_init(void) { struct ram_info ram; @@ -129,6 +132,7 @@ int dram_init(void) return 0; } +#endif ulong board_get_usable_ram_top(ulong total_size) { diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c index cc12a2afe3..c9f91efeee 100644 --- a/arch/arm/mach-rockchip/spl.c +++ b/arch/arm/mach-rockchip/spl.c @@ -10,6 +10,7 @@ #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig index 1df6d46d98..fe77072827 100644 --- a/configs/evb-rv1108_defconfig +++ b/configs/evb-rv1108_defconfig @@ -1,10 +1,18 @@ CONFIG_ARM=y +# CONFIG_SPL_USE_ARCH_MEMCPY is not set +# CONFIG_SPL_USE_ARCH_MEMSET is not set CONFIG_ARCH_ROCKCHIP=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ROCKCHIP_RV1108=y +CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y +CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TARGET_EVB_RV1108=y +CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb" CONFIG_DEBUG_UART=y # CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_STACK_R=y CONFIG_FASTBOOT=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_CMD_FASTBOOT=y @@ -19,6 +27,8 @@ CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_SPL_OF_PLATDATA=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_REGMAP=y CONFIG_SYSCON=y @@ -37,12 +47,15 @@ CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y CONFIG_PINCTRL=y CONFIG_DM_REGULATOR_FIXED=y +CONFIG_RAM=y +CONFIG_SPL_RAM=y CONFIG_DM_RESET=y CONFIG_BAUDRATE=1500000 # CONFIG_SPL_SERIAL_PRESENT is not set CONFIG_DEBUG_UART_BASE=0x10210000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_ROCKCHIP_SFC=y CONFIG_SYSRESET=y CONFIG_USB=y @@ -58,4 +71,5 @@ CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_G_DNL_MANUFACTURER="Rockchip" CONFIG_G_DNL_VENDOR_NUM=0x2207 CONFIG_G_DNL_PRODUCT_NUM=0x110a +CONFIG_SPL_TINY_MEMSET=y CONFIG_ERRNO_STR=y diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h index 065ecc8193..4f3f7a0434 100644 --- a/include/configs/rv1108_common.h +++ b/include/configs/rv1108_common.h @@ -14,11 +14,20 @@ #define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SYS_SDRAM_BASE 0x60000000 +#define SDRAM_MAX_SIZE 0x80000000 #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_TEXT_BASE CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x100000) #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x2000000) +/* SPL support */ +#define CONFIG_SPL_STACK 0x10080700 +#define CONFIG_SPL_TEXT_BASE 0x10080800 +#define CONFIG_SPL_MAX_SIZE 0x1700 + +/* BSS setup */ +#define CONFIG_SPL_BSS_MAX_SIZE 0x100 + #define CONFIG_ROCKUSB_G_DNL_PID 0x110A #define CONFIG_BOUNCE_BUFFER