From 396e3049bd88ad9273f7077b1396f0bc5703401a Mon Sep 17 00:00:00 2001
From: Elon Zhang <zhangzj@rock-chips.com>
Date: Fri, 14 Aug 2020 10:59:13 +0800
Subject: [PATCH] rochchip: board: only map op-tee share memory as dcache
 enabled

The cache fixup is for the data coherence when communication
between U-Boot and OP-TEE. And data abort exception appeares on
OP-TEE V1 32bit platform due to unknown reason.
So only the share memory need be mapped as dcache enabled.

Signed-off-by: Elon Zhang <zhangzj@rock-chips.com>
Change-Id: I92b62ef5fbdf47adc0328a14034a5861e8e77fed
---
 arch/arm/mach-rockchip/board.c            | 12 +++++++++---
 include/optee_include/OpteeClientApiLib.h |  1 +
 lib/optee_clientApi/OpteeClientApiLib.c   | 12 ++++++++++++
 3 files changed, 22 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index fa70b3366b..573bad48b2 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -35,6 +35,7 @@
 #include <power/charge_display.h>
 #include <power/regulator.h>
 #include <optee_include/OpteeClientInterface.h>
+#include <optee_include/OpteeClientApiLib.h>
 #include <optee_include/tee_api_defines.h>
 #include <asm/arch/boot_mode.h>
 #include <asm/arch/clock.h>
@@ -419,7 +420,7 @@ int board_fdt_fixup(void *blob)
 #if defined(CONFIG_ARM64_BOOT_AARCH32) || !defined(CONFIG_ARM64)
 /*
  * Common for OP-TEE:
- *	64-bit & 32-bit mode: dcache is always enabled;
+ *	64-bit & 32-bit mode: share memory dcache is always enabled;
  *
  * Common for U-Boot:
  *	64-bit mode: MMU table is static defined in rkxxx.c file, all memory
@@ -433,16 +434,21 @@ int board_fdt_fixup(void *blob)
  * For the data coherence when communication between U-Boot and OP-TEE, U-Boot
  * should follow OP-TEE MMU policy.
  *
- * So 32-bit mode U-Boot should map OP-TEE memory as dcache enabled.
+ * So 32-bit mode U-Boot should map OP-TEE share memory as dcache enabled.
  */
 int board_initr_caches_fixup(void)
 {
+#ifdef CONFIG_OPTEE_CLIENT
 	struct memblock mem;
 
-	mem = param_parse_optee_mem();
+	mem.base = 0;
+	mem.size = 0;
+
+	optee_get_shm_config(&mem.base, &mem.size);
 	if (mem.size)
 		mmu_set_region_dcache_behaviour(mem.base, mem.size,
 						DCACHE_WRITEBACK);
+#endif
 	return 0;
 }
 #endif
diff --git a/include/optee_include/OpteeClientApiLib.h b/include/optee_include/OpteeClientApiLib.h
index 8c68643e29..bf044336f4 100644
--- a/include/optee_include/OpteeClientApiLib.h
+++ b/include/optee_include/OpteeClientApiLib.h
@@ -11,5 +11,6 @@
 #include <optee_include/tee_client_api.h>
 
 TEEC_Result OpteeClientApiLibInitialize(void);
+void optee_get_shm_config(phys_addr_t *base, phys_size_t *size);
 
 #endif /*_OPTEE_CLIENT_APILIB_H_*/
diff --git a/lib/optee_clientApi/OpteeClientApiLib.c b/lib/optee_clientApi/OpteeClientApiLib.c
index 9429389b21..aa042859e9 100644
--- a/lib/optee_clientApi/OpteeClientApiLib.c
+++ b/lib/optee_clientApi/OpteeClientApiLib.c
@@ -39,6 +39,18 @@ static bool optee_api_revision_is_compatible(void)
 	}
 }
 
+void optee_get_shm_config(phys_addr_t *base, phys_size_t *size)
+{
+	ARM_SMC_ARGS ArmSmcArgs = {0};
+
+	ArmSmcArgs.Arg0 = OPTEE_SMC_GET_SHM_CONFIG_V2;
+
+	tee_smc_call(&ArmSmcArgs);
+
+	*base = ArmSmcArgs.Arg1;
+	*size = ArmSmcArgs.Arg2;
+}
+
 /*
  * Initlialize the library
  */