UPSTREAM: Convert CONFIG_NAND_ATMEL to Kconfig

This converts the following to Kconfig:
   CONFIG_NAND_ATMEL

Signed-off-by: Adam Ford <aford173@gmail.com>

Change-Id: Ic71bd0ef5704faf04852bf51d265d94e1a8dc259
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit e7db856bf96213ba3f6b716be9fa264e184f74e2)
This commit is contained in:
Adam Ford 2018-07-08 08:11:07 -05:00 committed by Kever Yang
parent e81e7a8556
commit 2cce6f5430
92 changed files with 636 additions and 23 deletions

View File

@ -32,6 +32,8 @@ CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -32,6 +32,8 @@ CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -32,6 +32,8 @@ CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -33,6 +33,8 @@ CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -33,6 +33,8 @@ CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -33,6 +33,8 @@ CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -37,6 +37,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -37,6 +37,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -37,6 +37,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -36,6 +36,8 @@ CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -36,6 +36,8 @@ CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -33,6 +33,8 @@ CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -33,6 +33,8 @@ CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -33,6 +33,8 @@ CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -34,6 +34,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -34,6 +34,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -32,6 +32,8 @@ CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -32,6 +32,8 @@ CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -32,6 +32,8 @@ CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -37,6 +37,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y

View File

@ -37,6 +37,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y

View File

@ -34,6 +34,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -34,6 +34,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -34,6 +34,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -37,6 +37,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -37,6 +37,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -37,6 +37,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -38,6 +38,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -38,6 +38,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -38,6 +38,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -38,6 +38,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -32,6 +32,8 @@ CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -32,6 +32,8 @@ CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -32,6 +32,8 @@ CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -37,6 +37,8 @@ CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_ENV_IS_IN_NAND=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y

View File

@ -42,6 +42,8 @@ CONFIG_CLK_AT91=y
CONFIG_AT91_UTMI=y
CONFIG_DFU_NAND=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_PHYLIB=y
# CONFIG_SPL_DM_SERIAL is not set
CONFIG_ATMEL_USART=y

View File

@ -45,6 +45,8 @@ CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -23,6 +23,8 @@ CONFIG_CMD_USB=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_PHYLIB=y
CONFIG_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y

View File

@ -26,6 +26,8 @@ CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -33,6 +33,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -33,6 +33,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -22,5 +22,7 @@ CONFIG_CMD_CACHE=y
CONFIG_CMD_JFFS2=y
CONFIG_ENV_IS_IN_NAND=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y

View File

@ -0,0 +1,63 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D2_PTC_EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xf801c000
CONFIG_DEBUG_UART_CLOCK=82000000
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_ptc_ek"
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_AT91_UTMI=y
CONFIG_AT91_H32MX=y
CONFIG_AT91_GENERIC_CLK=y
CONFIG_DM_GPIO=y
CONFIG_ATMEL_PIO4=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_AT91=y
CONFIG_I2C_EEPROM=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ATMEL=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91PIO4=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y

View File

@ -0,0 +1,63 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D2_PTC_EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xf801c000
CONFIG_DEBUG_UART_CLOCK=82000000
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_ptc_ek"
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2"
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_AT91_UTMI=y
CONFIG_AT91_H32MX=y
CONFIG_AT91_GENERIC_CLK=y
CONFIG_DM_GPIO=y
CONFIG_ATMEL_PIO4=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_AT91=y
CONFIG_I2C_EEPROM=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ATMEL=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91PIO4=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y

View File

@ -37,6 +37,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -37,6 +37,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -37,6 +37,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -54,6 +54,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y

View File

@ -51,6 +51,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y

View File

@ -55,6 +55,8 @@ CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -50,6 +50,8 @@ CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -51,6 +51,8 @@ CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -49,6 +49,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -46,6 +46,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -48,6 +48,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -52,6 +52,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -49,6 +49,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -48,6 +48,8 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

View File

@ -42,6 +42,8 @@ CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_DFU_NAND=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_PHYLIB=y
CONFIG_USB=y
CONFIG_DM_USB=y

View File

@ -28,5 +28,7 @@ CONFIG_CMD_FAT=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_CMD_PCA953X=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y

View File

@ -27,5 +27,7 @@ CONFIG_CMD_FAT=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_CMD_PCA953X=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y

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@ -47,6 +47,8 @@ CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_DFU_NAND=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y

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@ -30,6 +30,8 @@ CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

29
configs/wb45n_defconfig Normal file
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@ -0,0 +1,29 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x23f00000
CONFIG_TARGET_WB45N=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_LZMA=y
CONFIG_OF_LIBFDT=y

34
configs/wb50n_defconfig Normal file
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@ -0,0 +1,34 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x23f00000
CONFIG_TARGET_WB50N=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_NETDEVICES=y
CONFIG_LZMA=y
CONFIG_OF_LIBFDT=y

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@ -9,6 +9,13 @@ config SYS_NAND_SELF_INIT
This option, if enabled, provides more flexible and linux-like
NAND initialization process.
config NAND_ATMEL
bool "Support Atmel NAND controller"
imply SYS_NAND_USE_FLASH_BBT
help
Enable this driver for NAND flash platforms using an Atmel NAND
controller.
config NAND_DENALI
bool
select SYS_NAND_SELF_INIT

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@ -95,7 +95,6 @@
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
#define CONFIG_SYS_NAND_DBW_8

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@ -64,7 +64,6 @@
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_DBW_8

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@ -202,7 +202,6 @@
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
#define CONFIG_SYS_NAND_DBW_8 1

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@ -60,7 +60,6 @@
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
#define CONFIG_SYS_NAND_DBW_8

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@ -64,7 +64,6 @@
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)

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@ -55,7 +55,6 @@
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
#define CONFIG_SYS_NAND_DBW_8 1

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@ -65,7 +65,6 @@
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_DBW_8 1

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@ -70,7 +70,6 @@
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
#define CONFIG_SYS_NAND_DBW_8

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@ -68,7 +68,6 @@
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_DBW_8
#define CONFIG_NAND_ATMEL
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
/* our CLE is AD22 */

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@ -82,7 +82,6 @@
/* NAND flash */
#ifdef CONFIG_CMD_NAND
# define CONFIG_NAND_ATMEL
# define CONFIG_SYS_MAX_NAND_DEVICE 1
# define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 /* 0x40000000 */
# define CONFIG_SYS_NAND_DBW_8

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@ -165,7 +165,6 @@
#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
/* NAND flash */
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_DBW_8 1

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@ -188,7 +188,6 @@
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_DBW_8 1

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@ -77,7 +77,6 @@
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_DBW_8 1

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@ -0,0 +1,44 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Configuration file for the SAMA5D2 PTC EK Board.
*
* Copyright (C) 2017 Microchip Technology Inc.
* Wenyou Yang <wenyou.yang@microchip.com>
* Ludovic Desroches <ludovic.desroches@microchip.com>
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#include "at91-sama5_common.h"
#undef CONFIG_SYS_AT91_MAIN_CLOCK
#define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */
#define CONFIG_MISC_INIT_R
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x20000000
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
/* NAND Flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE BIT(21)
/* our CLE is AD22 */
#define CONFIG_SYS_NAND_MASK_CLE BIT(22)
#define CONFIG_SYS_NAND_ONFI_DETECTION
/* PMECC & PMERRLOC */
#define CONFIG_ATMEL_NAND_HWECC
#define CONFIG_ATMEL_NAND_HW_PMECC
#endif
#endif /* __CONFIG_H */

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@ -37,7 +37,6 @@
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
/* our ALE is AD21 */

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@ -70,7 +70,6 @@
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
/* our ALE is AD21 */

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@ -32,7 +32,6 @@
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
/* our ALE is AD21 */

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@ -32,7 +32,6 @@
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
/* our ALE is AD21 */

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@ -82,7 +82,6 @@
ROUND(3 * CONFIG_ENV_SIZE + (4 * SZ_1M), 0x1000)
/* NAND flash settings */
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
#define CONFIG_SYS_NAND_DBW_8

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@ -41,7 +41,6 @@
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + (1024 * 1024))
/* NAND Flash */
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
#define CONFIG_SYS_NAND_DBW_8

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@ -39,7 +39,6 @@
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + (1024 * 1024))
/* NAND Flash */
#define CONFIG_NAND_ATMEL
#define CONFIG_ATMEL_NAND_HWECC
#define CONFIG_SYS_NAND_ECC_BASE ATMEL_BASE_ECC
#define CONFIG_SYS_MAX_NAND_DEVICE 1

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@ -75,7 +75,6 @@
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
#define CONFIG_SYS_NAND_DBW_8

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@ -54,7 +54,6 @@
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
/* our ALE is AD21 */

150
include/configs/wb45n.h Normal file
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@ -0,0 +1,150 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Configuation settings for the WB45N CPU Module.
*/
#ifndef __CONFIG_H__
#define __CONFIG_H__
#include <asm/hardware.h>
/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SKIP_LOWLEVEL_INIT
/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
#define CONFIG_AT91_GPIO
/* serial console */
#define CONFIG_ATMEL_USART
#define CONFIG_USART_BASE ATMEL_BASE_DBGU
#define CONFIG_USART_ID ATMEL_ID_SYS
/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 MB */
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
/* NAND flash */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
/* our CLE is AD22 */
#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
/* PMECC & PMERRLOC */
#define CONFIG_ATMEL_NAND_HWECC 1
#define CONFIG_ATMEL_NAND_HW_PMECC 1
#define CONFIG_PMECC_CAP 4
#define CONFIG_PMECC_SECTOR_SIZE 512
#define CONFIG_MTD_DEVICE
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_PARTITIONS
#define CONFIG_RBTREE
#define CONFIG_LZO
/* Ethernet */
#define CONFIG_MACB
#define CONFIG_RMII
#define CONFIG_NET_RETRY_COUNT 20
#define CONFIG_MACB_SEARCH_PHY
#define CONFIG_ETHADDR C0:EE:40:00:00:00
#define CONFIG_ENV_OVERWRITE 1
/* System */
#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END 0x23e00000
#ifdef CONFIG_SYS_USE_NANDFLASH
/* bootstrap + u-boot + env + linux in nandflash */
#define CONFIG_ENV_OFFSET 0xa0000
#define CONFIG_ENV_OFFSET_REDUND 0xc0000
#define CONFIG_ENV_SIZE 0x20000 /* 1 block = 128 kB */
#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xe0000 0x280000; " \
"run _mtd; bootm"
#define MTDIDS_DEFAULT "nand0=atmel_nand"
#define MTDPARTS_DEFAULT "mtdparts=atmel_nand:" \
"128K(at91bs)," \
"512K(u-boot)," \
"128K(u-boot-env)," \
"128K(redund-env)," \
"2560K(kernel-a)," \
"2560K(kernel-b)," \
"38912K(rootfs-a)," \
"38912K(rootfs-b)," \
"46208K(user)," \
"512K(logs)"
#else
#error No boot method selected, please select 'CONFIG_SYS_USE_NANDFLASH'
#endif
#define CONFIG_BOOTARGS "console=ttyS0,115200 earlyprintk " \
"rw noinitrd mem=64M " \
"rootfstype=ubifs root=ubi0:rootfs ubi.mtd=6"
#define CONFIG_EXTRA_ENV_SETTINGS \
"_mtd=mtdparts default; setenv bootargs ${bootargs} ${mtdparts}\0" \
"autoload=no\0" \
"autostart=no\0" \
"ethaddr=" __stringify(CONFIG_ETHADDR) "\0" \
"\0"
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_MAXARGS 16
/*
* Size of malloc() pool
*/
#define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000)
/* SPL */
#define CONFIG_SPL_TEXT_BASE 0x300000
#define CONFIG_SPL_MAX_SIZE 0x6000
#define CONFIG_SPL_STACK 0x308000
#define CONFIG_SPL_BSS_START_ADDR 0x20000000
#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
#define CONFIG_SYS_MONITOR_LEN (512 << 10)
#define CONFIG_SYS_MASTER_CLOCK 132096000
#define CONFIG_SYS_AT91_PLLA 0x20c73f03
#define CONFIG_SYS_MCKR 0x1301
#define CONFIG_SYS_MCKR_CSS 0x1302
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
#define CONFIG_SYS_NAND_PAGE_COUNT 64
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
#endif /* __CONFIG_H__ */

124
include/configs/wb50n.h Normal file
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@ -0,0 +1,124 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Configuation settings for the WB50N CPU Module.
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#include <asm/hardware.h>
/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SKIP_LOWLEVEL_INIT
#endif
/* general purpose I/O */
#define CONFIG_AT91_GPIO
/* serial console */
#define CONFIG_ATMEL_USART
#define CONFIG_USART_BASE ATMEL_BASE_DBGU
#define CONFIG_USART_ID ATMEL_ID_DBGU
/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
#define CONFIG_SYS_SDRAM_SIZE 0x04000000
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_INIT_SP_ADDR 0x310000
#else
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
#endif
#define CONFIG_SYS_MEMTEST_START 0x21000000
#define CONFIG_SYS_MEMTEST_END 0x22000000
/* NAND flash */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
/* our CLE is AD22 */
#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
#define CONFIG_SYS_NAND_ONFI_DETECTION
/* PMECC & PMERRLOC */
#define CONFIG_ATMEL_NAND_HWECC
#define CONFIG_ATMEL_NAND_HW_PMECC
#define CONFIG_PMECC_CAP 8
#define CONFIG_PMECC_SECTOR_SIZE 512
/* Ethernet Hardware */
#define CONFIG_MACB
#define CONFIG_RMII
#define CONFIG_NET_RETRY_COUNT 20
#define CONFIG_MACB_SEARCH_PHY
#define CONFIG_RGMII
#define CONFIG_ETHADDR C0:EE:40:00:00:00
#define CONFIG_ENV_OVERWRITE 1
#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
#define CONFIG_EXTRA_ENV_SETTINGS \
"autoload=no\0" \
"autostart=no\0"
/* bootstrap + u-boot + env in nandflash */
#define CONFIG_ENV_OFFSET 0xA0000
#define CONFIG_ENV_OFFSET_REDUND 0xC0000
#define CONFIG_ENV_SIZE 0x20000
#define CONFIG_BOOTCOMMAND \
"nand read 0x22000000 0x000e0000 0x500000; " \
"bootm"
#define CONFIG_BOOTARGS \
"rw rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs"
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_PBSIZE \
(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024)
/* SPL */
#define CONFIG_SPL_TEXT_BASE 0x300000
#define CONFIG_SPL_MAX_SIZE 0x10000
#define CONFIG_SPL_BSS_START_ADDR 0x20000000
#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
#define CONFIG_SYS_MONITOR_LEN (512 << 10)
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
#define CONFIG_SYS_NAND_PAGE_COUNT 64
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
#endif

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@ -1543,7 +1543,6 @@ CONFIG_MY_OPTION
CONFIG_NANDFLASH_SIZE
CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC
CONFIG_NAND_ACTL
CONFIG_NAND_ATMEL
CONFIG_NAND_CS_INIT
CONFIG_NAND_DATA_REG
CONFIG_NAND_DAVINCI