rockchip: rk3568: rkvdec set clk 400MHZ
Change-Id: I3b154200fd81dab82a3c4956adf99437a51f88f9 Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
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@ -790,6 +790,10 @@ int spl_fit_standalone_release(uintptr_t entry_point)
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#define CRU_RATE_CNT_MIN 6
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#define CRU_PARENT_CNT_MIN 3
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#define RKVDEC_NODE_FDT_PATH "/rkvdec@fdf80200"
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#define RKVDEC_NORMAL_RATE_CNT_MIN 5
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#define RKVDEC_RATE_CNT_MIN 4
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int rk_board_fdt_fixup(const void *blob)
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{
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int node, len;
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@ -831,5 +835,31 @@ int rk_board_fdt_fixup(const void *blob)
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pp[5] = cpu_to_fdt32(PLL_CPLL);
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}
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node = fdt_path_offset(blob, RKVDEC_NODE_FDT_PATH);
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if (node < 0)
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return 0;
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pp = (u32 *)fdt_getprop(blob, node, "rockchip,normal-rates", &len);
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if (!pp)
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return 0;
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if ((len / 4) >= RKVDEC_NORMAL_RATE_CNT_MIN) {
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pp[0] = cpu_to_fdt32(400000000);
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pp[1] = cpu_to_fdt32(0);
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pp[2] = cpu_to_fdt32(400000000);
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pp[3] = cpu_to_fdt32(400000000);
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pp[4] = cpu_to_fdt32(400000000);
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}
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pp = (u32 *)fdt_getprop(blob, node, "assigned-clock-rates", &len);
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if (!pp)
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return 0;
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if ((len / 4) >= RKVDEC_RATE_CNT_MIN) {
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pp[0] = cpu_to_fdt32(400000000);
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pp[1] = cpu_to_fdt32(400000000);
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pp[2] = cpu_to_fdt32(400000000);
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pp[3] = cpu_to_fdt32(400000000);
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}
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return 0;
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}
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