From 2206b107471ec6de2875e7c5cf42d7180ed3a840 Mon Sep 17 00:00:00 2001 From: Jason Zhu Date: Mon, 8 Jun 2020 19:54:26 +0800 Subject: [PATCH] rockchip: rk3308: enlarge CONFIG_SPL_MAX_SIZE to 0x40000 We are using DRAM offset 0~0x40000 as SPL text size, Note that BSS, STACK and MALLOC may using separate space. Signed-off-by: Jason Zhu Change-Id: I19b5f868e8a596a627011ad127a9d34837a6c1b6 --- include/configs/rk3308_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h index d43d2cbdd1..1c2b9e4461 100644 --- a/include/configs/rk3308_common.h +++ b/include/configs/rk3308_common.h @@ -19,7 +19,7 @@ #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x00000000 -#define CONFIG_SPL_MAX_SIZE 0x20000 +#define CONFIG_SPL_MAX_SIZE 0x40000 #define CONFIG_SPL_BSS_START_ADDR 0x00400000 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000