qiurui
/
rv1126-uboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

UPSTREAM: net: dwc_et_qos: update weak function board_interface_eth_init 

Align the board and driver prototype for board_interface_eth_init
to avoid execution issue (the interface_type parameter is defined
as int or phy_interface_t).

To have a generic weak function (it should be reused by other driver)
I change the prototype to use directly udevice.

This prototype is added in netdev.h to allow compilation check
and avoid warning when compiling with W=1 on file
board/st/stm32mp1/stm32mp1.c

warning: no previous prototype for 'board_interface_eth_init'\
[-Wmissing-prototypes]
     int board_interface_eth_init(int interface_type, ....
         ^~~~~~~~~~~~~~~~~~~~~~~~

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: I7301e49ef8e51ecdde0629a69d7bcc07465952d0
This commit is contained in:
Patrick Delaunay 2019-08-01 11:29:03 +02:00 committed by Joseph Chen
parent 8aaada72f0
commit 1e8d5d80b6
3 changed files with 79 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

73
board/st/stm32mp1/stm32mp1.c
View File

@ -12,6 +12,9 @@
#include <i2c.h>
#include <led.h>
#include <misc.h>
#include <mtd.h>
#include <mtd_node.h>
#include <netdev.h>
#include <phy.h>
#include <reset.h>
#include <syscon.h>
@ -504,3 +507,73 @@ void board_quiesce_devices(void)
{
setup_led(LEDST_OFF);
}
/* eth init function : weak called in eqos driver */
int board_interface_eth_init(struct udevice *dev,
phy_interface_t interface_type)
{
u8 *syscfg;
u32 value;
bool eth_clk_sel_reg = false;
bool eth_ref_clk_sel_reg = false;
/* Gigabit Ethernet 125MHz clock selection. */
eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
/* Ethernet 50Mhz RMII clock selection */
eth_ref_clk_sel_reg =
dev_read_bool(dev, "st,eth_ref_clk_sel");
syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
if (!syscfg)
return -ENODEV;
switch (interface_type) {
case PHY_INTERFACE_MODE_MII:
value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
debug("%s: PHY_INTERFACE_MODE_MII\n", __func__);
break;
case PHY_INTERFACE_MODE_GMII:
if (eth_clk_sel_reg)
value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
SYSCFG_PMCSETR_ETH_CLK_SEL;
else
value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
debug("%s: PHY_INTERFACE_MODE_GMII\n", __func__);
break;
case PHY_INTERFACE_MODE_RMII:
if (eth_ref_clk_sel_reg)
value = SYSCFG_PMCSETR_ETH_SEL_RMII |
SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
else
value = SYSCFG_PMCSETR_ETH_SEL_RMII;
debug("%s: PHY_INTERFACE_MODE_RMII\n", __func__);
break;
case PHY_INTERFACE_MODE_RGMII:
case PHY_INTERFACE_MODE_RGMII_ID:
case PHY_INTERFACE_MODE_RGMII_RXID:
case PHY_INTERFACE_MODE_RGMII_TXID:
if (eth_clk_sel_reg)
value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
SYSCFG_PMCSETR_ETH_CLK_SEL;
else
value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
debug("%s: PHY_INTERFACE_MODE_RGMII\n", __func__);
break;
default:
debug("%s: Do not manage %d interface\n",
__func__, interface_type);
/* Do not manage others interfaces */
return -EINVAL;
}
/* clear and set ETH configuration bits */
writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
syscfg + SYSCFG_PMCCLRR);
writel(value, syscfg + SYSCFG_PMCSETR);
return 0;
}

16
drivers/net/dwc_eth_qos.c
View File

@ -1592,8 +1592,8 @@ err_free_reset_eqos:
}
/* board-specific Ethernet Interface initializations. */
__weak int board_interface_eth_init(int interface_type, bool eth_clk_sel_reg,
bool eth_ref_clk_sel_reg)
__weak int board_interface_eth_init(struct udevice *dev,
phy_interface_t interface_type)
{
return 0;
}
@ -1603,8 +1603,6 @@ static int eqos_probe_resources_stm32(struct udevice *dev)
struct eqos_priv *eqos = dev_get_priv(dev);
int ret;
phy_interface_t interface;
bool eth_clk_sel_reg = false;
bool eth_ref_clk_sel_reg = false;
debug("%s(dev=%p):\n", __func__, dev);
@ -1615,15 +1613,7 @@ static int eqos_probe_resources_stm32(struct udevice *dev)
return -EINVAL;
}
/* Gigabit Ethernet 125MHz clock selection. */
eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
/* Ethernet 50Mhz RMII clock selection */
eth_ref_clk_sel_reg =
dev_read_bool(dev, "st,eth_ref_clk_sel");
ret = board_interface_eth_init(interface, eth_clk_sel_reg,
eth_ref_clk_sel_reg);
ret = board_interface_eth_init(dev, interface);
if (ret)
return -EINVAL;

3
include/netdev.h
View File

@ -11,6 +11,7 @@
#ifndef _NETDEV_H_
#define _NETDEV_H_
#include <phy_interface.h>
/*
* Board and CPU-specific initialization functions
@ -22,6 +23,8 @@
*/
int board_eth_init(bd_t *bis);
int board_interface_eth_init(struct udevice *dev,
phy_interface_t interface_type);
int cpu_eth_init(bd_t *bis);
/* Driver initialization prototypes */