rockchip: rk3568: place U-Boot at 10MB offset
2~10MB region is for OP-TEE. Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: Ic4d4beb9e42a2b17665102c811e59b5864cbc888
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@ -19,9 +19,9 @@
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#define CONFIG_SYS_MALLOC_LEN (32 << 20)
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#define CONFIG_SYS_MALLOC_LEN (32 << 20)
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#define CONFIG_SYS_CBSIZE 1024
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#define CONFIG_SYS_CBSIZE 1024
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_SYS_TEXT_BASE 0x00600000
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#define CONFIG_SYS_TEXT_BASE 0x00a00000
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#define CONFIG_SYS_INIT_SP_ADDR 0x00800000
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#define CONFIG_SYS_INIT_SP_ADDR 0x00c00000
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#define CONFIG_SYS_LOAD_ADDR 0x00800800
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#define CONFIG_SYS_LOAD_ADDR 0x00c00800
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#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
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#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
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#define COUNTER_FREQUENCY 24000000
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#define COUNTER_FREQUENCY 24000000
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@ -51,11 +51,11 @@
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#define CONFIG_ROCKUSB_G_DNL_PID 0x350a
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#define CONFIG_ROCKUSB_G_DNL_PID 0x350a
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#define ENV_MEM_LAYOUT_SETTINGS \
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#define ENV_MEM_LAYOUT_SETTINGS \
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"scriptaddr=0x00500000\0" \
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"scriptaddr=0x00b00000\0" \
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"pxefile_addr_r=0x00600000\0" \
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"pxefile_addr_r=0x00a00000\0" \
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"fdt_addr_r=0x0a100000\0" \
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"fdt_addr_r=0x0a100000\0" \
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"kernel_addr_no_bl32_r=0x00280000\0" \
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"kernel_addr_no_bl32_r=0x00280000\0" \
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"kernel_addr_r=0x00680000\0" \
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"kernel_addr_r=0x00a80000\0" \
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"kernel_addr_c=0x04080000\0" \
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"kernel_addr_c=0x04080000\0" \
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"ramdisk_addr_r=0x0a200000\0"
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"ramdisk_addr_r=0x0a200000\0"
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