rockchip: rk3308: enable IRQs

Change-Id: I1d708bd89bbe9e2ad7a5213cc7bed22a0c2655a5
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

arch/arm/mach-rockchip/Kconfig

@@ -214,6 +214,7 @@ config ROCKCHIP_RK3308
 	select ARM64 if !ARM64_BOOT_AARCH32
 	select DEBUG_UART_BOARD_INIT
 	select ARM_SMCCC
+	select GICV2
 	help
 	  The Rockchip RK3308 is a ARM-based Soc which embeded with quad
 	  Cortex-A35 and highly integrated audio interfaces.

include/configs/rk3308_common.h

@@ -25,8 +25,8 @@
 
 #define COUNTER_FREQUENCY		24000000
 
-#define GICD_BASE			0xff131000
-#define GICC_BASE			0xff132000
+#define GICD_BASE			0xff581000
+#define GICC_BASE			0xff582000
 
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
 

include/irq-platform.h

@@ -153,6 +153,25 @@
 #define GPIO_BANK_NUM			4
 #define GPIO_BANK_PINS			32
 
+#elif defined(CONFIG_ROCKCHIP_RK3308)
+#define GPIO0_PHYS			0xff220000
+#define GPIO1_PHYS			0xff230000
+#define GPIO2_PHYS			0xff240000
+#define GPIO3_PHYS			0xff250000
+#define GPIO4_PHYS			0xff260000
+
+#define IRQ_TIMER1			58	/* ch0 ns timer1 */
+#define IRQ_GPIO0			72
+#define IRQ_GPIO1			73
+#define IRQ_GPIO2			74
+#define IRQ_GPIO3			75
+#define IRQ_GPIO4			76
+
+#define GIC_IRQS_NR			(5 * 32)
+#define GPIO_IRQS_NR			(5 * 32)
+
+#define GPIO_BANK_NUM			5
+#define GPIO_BANK_PINS			32
 #else
 "Missing define RIQ relative things"
 #endif

include/rk_timer_irq.h

@@ -41,6 +41,9 @@
 #elif defined(CONFIG_ROCKCHIP_RK3399)
 #define TIMER_BASE		(0xFF850000 + 0x20)	/* TIMER 1 */
 #define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_RK3308)
+#define TIMER_BASE		(0xFF1a0000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
 #elif defined(CONFIG_ROCKCHIP_PX30)
 /*
  * Use timer0 and never change, because timer0 will be used in charge animation