phy: phy-rockchip-inno-usb2: amend dt parse api
This change amend getting PHY udevice direct instead of parsing ofnode_path step by step. Change-Id: I145f5ef8361c471f3e69f193430e98ef8168b901 Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
This commit is contained in:
Frank Wang
Kever Yang
parent
335adcb55f
commit
065655143e
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@ -183,88 +183,6 @@ static inline bool property_enabled(void __iomem *base,
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return tmp == reg->enable;
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}
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static int rockchip_usb2phy_parse(struct rockchip_usb2phy *rphy)
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{
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const struct rockchip_usb2phy_cfg *phy_cfgs;
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ofnode u2phy_node = ofnode_null();
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ofnode grf_node = ofnode_null();
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void __iomem *usbgrf_base = NULL;
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void __iomem *grf_base = NULL;
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struct udevice *udev;
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fdt_size_t size;
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u32 reg, index;
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int ret;
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memset((void *)rphy, 0, sizeof(struct rockchip_usb2phy));
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u2phy_node = ofnode_path("/usb2-phy");
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if (ofnode_valid(u2phy_node)) {
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if (ofnode_read_bool(u2phy_node, "rockchip,grf"))
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grf_base = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
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if (ofnode_read_bool(u2phy_node, "rockchip,usbgrf"))
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usbgrf_base =
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syscon_get_first_range(ROCKCHIP_SYSCON_USBGRF);
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else
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usbgrf_base = NULL;
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} else {
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grf_node = ofnode_path("/syscon-usb");
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if (ofnode_valid(grf_node)) {
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grf_base = (void __iomem *)
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ofnode_get_addr_size(grf_node, "reg", &size);
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u2phy_node = ofnode_find_subnode(grf_node, "usb2-phy");
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}
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}
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if (!grf_base && !usbgrf_base) {
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pr_err("%s: get grf/usbgrf node failed\n", __func__);
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return -EINVAL;
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}
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if (!ofnode_valid(u2phy_node)) {
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pr_err("%s: missing u2phy node\n", __func__);
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return -EINVAL;
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}
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if (ofnode_read_u32(u2phy_node, "reg", ®)) {
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pr_err("%s: could not read reg from u2phy node\n", __func__);
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return -EINVAL;
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}
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ret = uclass_get_device_by_ofnode(UCLASS_PHY, u2phy_node, &udev);
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if (ret) {
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pr_err("%s: get u2phy node failed: %d\n", __func__, ret);
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return -ENODEV;
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}
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phy_cfgs =
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(const struct rockchip_usb2phy_cfg *)dev_get_driver_data(udev);
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if (!phy_cfgs) {
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pr_err("%s: unable to get phy_cfgs\n", __func__);
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return -EINVAL;
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}
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/* find out a proper config which can be matched with dt. */
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index = 0;
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while (phy_cfgs[index].reg) {
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if (phy_cfgs[index].reg == reg) {
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rphy->phy_cfg = &phy_cfgs[index];
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break;
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}
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++index;
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}
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if (!rphy->phy_cfg) {
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pr_err("%s: no phy-config can be matched\n", __func__);
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return -EINVAL;
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}
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rphy->grf_base = grf_base;
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rphy->usbgrf_base = usbgrf_base;
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return 0;
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}
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static const char *chg_to_string(enum power_supply_type chg_type)
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{
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switch (chg_type) {
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@ -330,57 +248,59 @@ int rockchip_chg_get_type(void)
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{
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const struct rockchip_usb2phy_port_cfg *port_cfg;
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enum power_supply_type chg_type;
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struct rockchip_usb2phy rphy;
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struct rockchip_usb2phy *rphy;
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struct udevice *udev;
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void __iomem *base;
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bool is_dcd, vout;
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int ret;
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ret = rockchip_usb2phy_parse(&rphy);
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if (ret) {
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pr_err("%s: parse usb2phy failed %d\n", __func__, ret);
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ret = uclass_get_device(UCLASS_PHY, 0, &udev);
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if (ret == -ENODEV) {
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pr_err("%s: get u2phy node failed: %d\n", __func__, ret);
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return ret;
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}
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base = get_reg_base(&rphy);
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port_cfg = &rphy.phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
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rphy = dev_get_priv(udev);
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base = get_reg_base(rphy);
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port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
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/* Suspend USB-PHY and put the controller in non-driving mode */
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property_enable(base, &port_cfg->phy_sus, true);
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property_enable(base, &rphy.phy_cfg->chg_det.opmode, false);
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property_enable(base, &rphy->phy_cfg->chg_det.opmode, false);
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rphy.dcd_retries = CHG_DCD_MAX_RETRIES;
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rphy.primary_retries = CHG_PRI_MAX_RETRIES;
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rphy->dcd_retries = CHG_DCD_MAX_RETRIES;
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rphy->primary_retries = CHG_PRI_MAX_RETRIES;
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/* stage 1, start DCD processing stage */
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rockchip_chg_enable_dcd(&rphy, true);
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rockchip_chg_enable_dcd(rphy, true);
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while (rphy.dcd_retries--) {
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while (rphy->dcd_retries--) {
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mdelay(CHG_DCD_POLL_TIME);
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/* get data contact detection status */
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is_dcd = property_enabled(rphy.grf_base,
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&rphy.phy_cfg->chg_det.dp_det);
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is_dcd = property_enabled(rphy->grf_base,
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&rphy->phy_cfg->chg_det.dp_det);
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if (is_dcd || !rphy.dcd_retries) {
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if (is_dcd || !rphy->dcd_retries) {
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/*
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* stage 2, turn off DCD circuitry, then
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* voltage source on DP, probe on DM.
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*/
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rockchip_chg_enable_dcd(&rphy, false);
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rockchip_chg_enable_primary_det(&rphy, true);
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rockchip_chg_enable_dcd(rphy, false);
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rockchip_chg_enable_primary_det(rphy, true);
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break;
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}
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}
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mdelay(CHG_PRIMARY_DET_TIME);
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vout = property_enabled(rphy.grf_base,
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&rphy.phy_cfg->chg_det.cp_det);
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rockchip_chg_enable_primary_det(&rphy, false);
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vout = property_enabled(rphy->grf_base,
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&rphy->phy_cfg->chg_det.cp_det);
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rockchip_chg_enable_primary_det(rphy, false);
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if (vout) {
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/* stage 3, voltage source on DM, probe on DP */
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rockchip_chg_enable_secondary_det(&rphy, true);
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rockchip_chg_enable_secondary_det(rphy, true);
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} else {
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if (!rphy.dcd_retries) {
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if (!rphy->dcd_retries) {
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/* floating charger found */
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chg_type = POWER_SUPPLY_TYPE_USB_FLOATING;
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goto out;
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@ -389,10 +309,10 @@ int rockchip_chg_get_type(void)
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* Retry some times to make sure that it's
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* really a USB SDP charger.
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*/
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vout = rockchip_chg_primary_det_retry(&rphy);
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vout = rockchip_chg_primary_det_retry(rphy);
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if (vout) {
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/* stage 3, voltage source on DM, probe on DP */
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rockchip_chg_enable_secondary_det(&rphy, true);
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rockchip_chg_enable_secondary_det(rphy, true);
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} else {
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/* USB SDP charger found */
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chg_type = POWER_SUPPLY_TYPE_USB;
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@ -402,10 +322,10 @@ int rockchip_chg_get_type(void)
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}
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mdelay(CHG_SECONDARY_DET_TIME);
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vout = property_enabled(rphy.grf_base,
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&rphy.phy_cfg->chg_det.dcp_det);
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vout = property_enabled(rphy->grf_base,
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&rphy->phy_cfg->chg_det.dcp_det);
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/* stage 4, turn off voltage source */
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rockchip_chg_enable_secondary_det(&rphy, false);
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rockchip_chg_enable_secondary_det(rphy, false);
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if (vout)
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chg_type = POWER_SUPPLY_TYPE_USB_DCP;
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else
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@ -413,7 +333,7 @@ int rockchip_chg_get_type(void)
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out:
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/* Resume USB-PHY and put the controller in normal mode */
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property_enable(base, &rphy.phy_cfg->chg_det.opmode, true);
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property_enable(base, &rphy->phy_cfg->chg_det.opmode, true);
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property_enable(base, &port_cfg->phy_sus, false);
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debug("charger is %s\n", chg_to_string(chg_type));
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@ -424,21 +344,23 @@ out:
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void otg_phy_init(struct dwc2_udc *dev)
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{
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const struct rockchip_usb2phy_port_cfg *port_cfg;
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struct rockchip_usb2phy rphy;
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struct rockchip_usb2phy *rphy;
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struct udevice *udev;
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void __iomem *base;
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int ret;
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ret = rockchip_usb2phy_parse(&rphy);
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if (ret) {
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pr_err("%s: parse usb2phy failed %d\n", __func__, ret);
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ret = uclass_get_device(UCLASS_PHY, 0, &udev);
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if (ret == -ENODEV) {
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pr_err("%s: get u2phy node failed: %d\n", __func__, ret);
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return;
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}
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base = get_reg_base(&rphy);
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port_cfg = &rphy.phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
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rphy = dev_get_priv(udev);
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base = get_reg_base(rphy);
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port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
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/* Set the USB-PHY COMMONONN to 1'b0 to ensure USB's clocks */
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property_enable(base, &rphy.phy_cfg->clkout_ctl, false);
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property_enable(base, &rphy->phy_cfg->clkout_ctl, false);
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/* Reset USB-PHY */
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property_enable(base, &port_cfg->phy_sus, true);
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