2017-06-01 10:00:55 +00:00
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/*
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* (C) Copyright 2016 Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_RV1108_COMMON_H
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#define __CONFIG_RV1108_COMMON_H
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#include <asm/arch/hardware.h>
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#include "rockchip-common.h"
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#define CONFIG_SYS_MALLOC_LEN (32 << 20)
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#define CONFIG_SYS_CBSIZE 1024
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_SYS_SDRAM_BASE 0x60000000
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2018-02-01 07:40:55 +00:00
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#define SDRAM_MAX_SIZE 0x80000000
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2017-06-01 10:00:55 +00:00
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#define CONFIG_SYS_TEXT_BASE CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x100000)
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x2000000)
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2018-02-01 07:40:55 +00:00
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/* SPL support */
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#define CONFIG_SPL_STACK 0x10080700
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#define CONFIG_SPL_TEXT_BASE 0x10080800
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#define CONFIG_SPL_MAX_SIZE 0x1700
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/* BSS setup */
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#define CONFIG_SPL_BSS_MAX_SIZE 0x100
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2017-11-13 09:46:11 +00:00
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#define CONFIG_ROCKUSB_G_DNL_PID 0x110A
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2018-01-29 07:14:37 +00:00
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#define CONFIG_BOUNCE_BUFFER
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2017-10-30 06:50:44 +00:00
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/* usb mass storage */
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#define CONFIG_USB_FUNCTION_MASS_STORAGE
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2017-08-09 03:36:27 +00:00
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/* rockchip ohci host driver */
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#define CONFIG_USB_OHCI_NEW
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
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2017-06-01 10:00:55 +00:00
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#endif
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