2017-09-15 08:23:03 +00:00
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/*
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* (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <asm/unaligned.h>
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#include <config.h>
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#include <common.h>
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#include <errno.h>
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2018-03-04 16:20:11 +00:00
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#include <linux/libfdt.h>
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2017-09-15 08:23:03 +00:00
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#include <fdtdec.h>
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#include <fdt_support.h>
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2018-07-13 01:09:39 +00:00
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#include <linux/hdmi.h>
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2017-09-15 08:23:03 +00:00
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#include <linux/list.h>
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#include <linux/compat.h>
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#include <linux/media-bus-format.h>
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#include <malloc.h>
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#include <video.h>
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2017-10-27 09:45:11 +00:00
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#include <video_rockchip.h>
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2018-11-30 09:23:04 +00:00
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#include <video_bridge.h>
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2017-09-15 08:23:03 +00:00
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#include <dm/device.h>
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#include <dm/uclass-internal.h>
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2017-10-19 10:22:10 +00:00
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#include <asm/arch-rockchip/resource_img.h>
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2017-09-15 08:23:03 +00:00
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#include "bmp_helper.h"
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#include "rockchip_display.h"
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#include "rockchip_crtc.h"
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#include "rockchip_connector.h"
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2018-11-30 09:23:04 +00:00
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#include "rockchip_bridge.h"
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2017-09-15 08:23:03 +00:00
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#include "rockchip_phy.h"
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#include "rockchip_panel.h"
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2018-02-06 13:31:18 +00:00
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#include <dm.h>
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#include <dm/of_access.h>
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#include <dm/ofnode.h>
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2017-09-15 08:23:03 +00:00
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2018-10-09 09:42:39 +00:00
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#define DRIVER_VERSION "v1.0.1"
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2018-03-01 03:54:36 +00:00
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/***********************************************************************
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* Rockchip UBOOT DRM driver version
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*
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* v1.0.0 : add basic version for rockchip drm driver(hjc)
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2018-10-09 09:42:39 +00:00
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* v1.0.1 : add much dsi update(hjc)
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2018-03-01 03:54:36 +00:00
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*
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**********************************************************************/
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2017-10-19 10:22:10 +00:00
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#define RK_BLK_SIZE 512
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2019-03-28 07:26:28 +00:00
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#define BMP_PROCESSED_FLAG 8399
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2017-10-19 10:22:10 +00:00
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2017-09-15 08:23:03 +00:00
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DECLARE_GLOBAL_DATA_PTR;
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static LIST_HEAD(rockchip_display_list);
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static LIST_HEAD(logo_cache_list);
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2017-10-19 10:22:10 +00:00
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static unsigned long memory_start;
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static unsigned long memory_end;
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2017-09-15 08:23:03 +00:00
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2018-08-15 01:06:22 +00:00
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/*
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* the phy types are used by different connectors in public.
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* The current version only has inno hdmi phy for hdmi and tve.
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*/
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enum public_use_phy {
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NONE,
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INNO_HDMI_PHY
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};
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/* save public phy data */
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struct public_phy_data {
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const struct rockchip_phy *phy_drv;
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int phy_node;
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int public_phy_type;
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bool phy_init;
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};
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/* check which kind of public phy does connector use */
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static int check_public_use_phy(struct display_state *state)
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{
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int ret = NONE;
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#ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
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struct connector_state *conn_state = &state->conn_state;
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if (!strncmp(dev_read_name(conn_state->dev), "tve", 3) ||
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!strncmp(dev_read_name(conn_state->dev), "hdmi", 4))
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ret = INNO_HDMI_PHY;
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#endif
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return ret;
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}
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/*
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* get public phy driver and initialize it.
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* The current version only has inno hdmi phy for hdmi and tve.
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*/
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static int get_public_phy(struct display_state *state,
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struct public_phy_data *data)
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{
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struct connector_state *conn_state = &state->conn_state;
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2018-09-26 06:21:09 +00:00
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struct rockchip_phy *phy;
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2018-08-15 01:06:22 +00:00
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struct udevice *dev;
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int ret = 0;
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switch (data->public_phy_type) {
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case INNO_HDMI_PHY:
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#if defined(CONFIG_ROCKCHIP_RK3328)
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2018-09-26 06:21:09 +00:00
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ret = uclass_get_device_by_name(UCLASS_PHY,
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"hdmiphy@ff430000", &dev);
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2018-08-15 01:06:22 +00:00
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#elif defined(CONFIG_ROCKCHIP_RK322X)
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2018-09-26 06:21:09 +00:00
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ret = uclass_get_device_by_name(UCLASS_PHY,
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"hdmi-phy@12030000", &dev);
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2018-08-15 01:06:22 +00:00
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#else
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ret = -EINVAL;
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#endif
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if (ret) {
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printf("Warn: can't find phy driver\n");
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return 0;
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}
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2018-09-26 06:21:09 +00:00
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phy = (struct rockchip_phy *)dev_get_driver_data(dev);
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2018-08-15 01:06:22 +00:00
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if (!phy) {
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printf("failed to get phy driver\n");
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return 0;
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}
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2018-09-26 06:21:09 +00:00
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ret = rockchip_phy_init(phy);
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if (ret) {
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2018-08-15 01:06:22 +00:00
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printf("failed to init phy driver\n");
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2018-09-26 06:21:09 +00:00
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return ret;
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2018-08-15 01:06:22 +00:00
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}
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conn_state->phy = phy;
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2019-08-12 03:39:32 +00:00
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debug("inno hdmi phy init success, save it\n");
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2018-08-15 01:06:22 +00:00
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data->phy_drv = conn_state->phy;
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data->phy_init = true;
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return 0;
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default:
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return -EINVAL;
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}
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}
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2017-10-19 10:22:10 +00:00
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static void init_display_buffer(ulong base)
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2017-09-15 08:23:03 +00:00
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{
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2017-10-19 10:22:10 +00:00
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memory_start = base + DRM_ROCKCHIP_FB_SIZE;
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2017-09-15 08:23:03 +00:00
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memory_end = memory_start;
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}
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static void *get_display_buffer(int size)
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{
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unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE);
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void *buf;
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if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) {
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printf("failed to alloc %dbyte memory to display\n", size);
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return NULL;
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}
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buf = (void *)roundup_memory;
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memory_end = roundup_memory + size;
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return buf;
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}
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static unsigned long get_display_size(void)
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{
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return memory_end - memory_start;
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}
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2018-11-30 03:25:21 +00:00
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static bool can_direct_logo(int bpp)
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2017-09-15 08:23:03 +00:00
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{
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2018-11-30 03:25:21 +00:00
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return bpp == 24 || bpp == 32;
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2017-09-15 08:23:03 +00:00
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}
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2018-08-15 01:06:22 +00:00
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static int connector_phy_init(struct display_state *state,
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struct public_phy_data *data)
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2017-09-15 08:23:03 +00:00
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{
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struct connector_state *conn_state = &state->conn_state;
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2018-12-18 12:17:40 +00:00
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int type;
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2018-08-15 01:06:22 +00:00
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/* does this connector use public phy with others */
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type = check_public_use_phy(state);
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if (type == INNO_HDMI_PHY) {
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/* there is no public phy was initialized */
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if (!data->phy_init) {
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2019-08-12 03:39:32 +00:00
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debug("start get public phy\n");
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2018-08-15 01:06:22 +00:00
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data->public_phy_type = type;
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if (get_public_phy(state, data)) {
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printf("can't find correct public phy type\n");
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free(data);
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return -EINVAL;
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}
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return 0;
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}
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/* if this phy has been initialized, get it directly */
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2018-09-26 06:21:09 +00:00
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conn_state->phy = (struct rockchip_phy *)data->phy_drv;
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2018-08-15 01:06:22 +00:00
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return 0;
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}
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2017-09-15 08:23:03 +00:00
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return 0;
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}
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static int connector_panel_init(struct display_state *state)
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{
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struct connector_state *conn_state = &state->conn_state;
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struct panel_state *panel_state = &state->panel_state;
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2018-11-30 09:23:04 +00:00
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const struct rockchip_panel *panel = panel_state->panel;
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2018-02-06 13:31:18 +00:00
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ofnode dsp_lut_node;
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2017-09-15 08:23:03 +00:00
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int ret, len;
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2018-11-30 09:23:04 +00:00
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if (!panel)
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2017-10-19 10:22:10 +00:00
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return 0;
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2017-09-15 08:23:03 +00:00
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2018-11-30 09:23:04 +00:00
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dsp_lut_node = dev_read_subnode(panel->dev, "dsp-lut");
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2018-02-06 13:31:18 +00:00
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if (!ofnode_valid(dsp_lut_node)) {
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2018-11-30 03:25:21 +00:00
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debug("%s can not find dsp-lut node\n", __func__);
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2018-02-26 02:14:27 +00:00
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return 0;
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2018-02-06 13:31:18 +00:00
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}
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2018-02-26 02:14:27 +00:00
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2018-02-06 13:31:18 +00:00
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ofnode_get_property(dsp_lut_node, "gamma-lut", &len);
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2017-09-15 08:23:03 +00:00
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if (len > 0) {
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2018-02-06 13:31:18 +00:00
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conn_state->gamma.size = len / sizeof(u32);
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2017-09-15 08:23:03 +00:00
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conn_state->gamma.lut = malloc(len);
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if (!conn_state->gamma.lut) {
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printf("malloc gamma lut failed\n");
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return -ENOMEM;
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}
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2018-02-06 13:31:18 +00:00
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ret = ofnode_read_u32_array(dsp_lut_node, "gamma-lut",
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conn_state->gamma.lut,
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conn_state->gamma.size);
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if (ret) {
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2017-09-15 08:23:03 +00:00
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printf("Cannot decode gamma_lut\n");
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conn_state->gamma.lut = NULL;
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return -EINVAL;
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}
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panel_state->dsp_lut_node = dsp_lut_node;
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}
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return 0;
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}
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int drm_mode_vrefresh(const struct drm_display_mode *mode)
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{
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int refresh = 0;
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unsigned int calc_val;
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if (mode->vrefresh > 0) {
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refresh = mode->vrefresh;
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} else if (mode->htotal > 0 && mode->vtotal > 0) {
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int vtotal;
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vtotal = mode->vtotal;
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/* work out vrefresh the value will be x1000 */
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calc_val = (mode->clock * 1000);
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calc_val /= mode->htotal;
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refresh = (calc_val + vtotal / 2) / vtotal;
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if (mode->flags & DRM_MODE_FLAG_INTERLACE)
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refresh *= 2;
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if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
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refresh /= 2;
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if (mode->vscan > 1)
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refresh /= mode->vscan;
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}
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return refresh;
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}
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2018-02-06 13:31:18 +00:00
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static int display_get_timing_from_dts(struct panel_state *panel_state,
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2017-09-15 08:23:03 +00:00
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struct drm_display_mode *mode)
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{
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2018-11-30 09:23:04 +00:00
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struct rockchip_panel *panel = panel_state->panel;
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2018-02-06 13:31:18 +00:00
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int phandle;
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2017-09-15 08:23:03 +00:00
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int hactive, vactive, pixelclock;
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int hfront_porch, hback_porch, hsync_len;
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int vfront_porch, vback_porch, vsync_len;
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int val, flags = 0;
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2018-02-06 13:31:18 +00:00
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ofnode timing, native_mode;
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2017-09-15 08:23:03 +00:00
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2018-11-30 09:23:04 +00:00
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timing = dev_read_subnode(panel->dev, "display-timings");
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2018-02-06 13:31:18 +00:00
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if (!ofnode_valid(timing))
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2017-09-15 08:23:03 +00:00
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return -ENODEV;
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2018-02-06 13:31:18 +00:00
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native_mode = ofnode_find_subnode(timing, "timing");
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if (!ofnode_valid(native_mode)) {
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phandle = ofnode_read_u32_default(timing, "native-mode", -1);
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native_mode = np_to_ofnode(of_find_node_by_phandle(phandle));
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if (!ofnode_valid(native_mode)) {
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2017-09-15 08:23:03 +00:00
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printf("failed to get display timings from DT\n");
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return -ENXIO;
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}
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}
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#define FDT_GET_INT(val, name) \
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2018-02-06 13:31:18 +00:00
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|
|
val = ofnode_read_s32_default(native_mode, name, -1); \
|
2017-09-15 08:23:03 +00:00
|
|
|
if (val < 0) { \
|
|
|
|
|
printf("Can't get %s\n", name); \
|
|
|
|
|
return -ENXIO; \
|
|
|
|
|
}
|
|
|
|
|
|
2019-05-31 03:18:34 +00:00
|
|
|
#define FDT_GET_INT_DEFAULT(val, name, default) \
|
|
|
|
|
val = ofnode_read_s32_default(native_mode, name, default);
|
|
|
|
|
|
2017-09-15 08:23:03 +00:00
|
|
|
FDT_GET_INT(hactive, "hactive");
|
|
|
|
|
FDT_GET_INT(vactive, "vactive");
|
|
|
|
|
FDT_GET_INT(pixelclock, "clock-frequency");
|
|
|
|
|
FDT_GET_INT(hsync_len, "hsync-len");
|
|
|
|
|
FDT_GET_INT(hfront_porch, "hfront-porch");
|
|
|
|
|
FDT_GET_INT(hback_porch, "hback-porch");
|
|
|
|
|
FDT_GET_INT(vsync_len, "vsync-len");
|
|
|
|
|
FDT_GET_INT(vfront_porch, "vfront-porch");
|
|
|
|
|
FDT_GET_INT(vback_porch, "vback-porch");
|
|
|
|
|
FDT_GET_INT(val, "hsync-active");
|
|
|
|
|
flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
|
|
|
|
|
FDT_GET_INT(val, "vsync-active");
|
|
|
|
|
flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
|
2018-04-20 03:28:39 +00:00
|
|
|
FDT_GET_INT(val, "pixelclk-active");
|
|
|
|
|
flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0;
|
2017-09-15 08:23:03 +00:00
|
|
|
|
2019-05-31 03:18:34 +00:00
|
|
|
FDT_GET_INT_DEFAULT(val, "screen-rotate", 0);
|
|
|
|
|
if (val == DRM_MODE_FLAG_XMIRROR) {
|
|
|
|
|
flags |= DRM_MODE_FLAG_XMIRROR;
|
|
|
|
|
} else if (val == DRM_MODE_FLAG_YMIRROR) {
|
|
|
|
|
flags |= DRM_MODE_FLAG_YMIRROR;
|
|
|
|
|
} else if (val == DRM_MODE_FLAG_XYMIRROR) {
|
|
|
|
|
flags |= DRM_MODE_FLAG_XMIRROR;
|
|
|
|
|
flags |= DRM_MODE_FLAG_YMIRROR;
|
|
|
|
|
}
|
2017-09-15 08:23:03 +00:00
|
|
|
mode->hdisplay = hactive;
|
|
|
|
|
mode->hsync_start = mode->hdisplay + hfront_porch;
|
|
|
|
|
mode->hsync_end = mode->hsync_start + hsync_len;
|
|
|
|
|
mode->htotal = mode->hsync_end + hback_porch;
|
|
|
|
|
|
|
|
|
|
mode->vdisplay = vactive;
|
|
|
|
|
mode->vsync_start = mode->vdisplay + vfront_porch;
|
|
|
|
|
mode->vsync_end = mode->vsync_start + vsync_len;
|
|
|
|
|
mode->vtotal = mode->vsync_end + vback_porch;
|
|
|
|
|
|
|
|
|
|
mode->clock = pixelclock / 1000;
|
|
|
|
|
mode->flags = flags;
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2017-12-13 11:35:59 +00:00
|
|
|
/**
|
|
|
|
|
* drm_mode_set_crtcinfo - set CRTC modesetting timing parameters
|
|
|
|
|
* @p: mode
|
|
|
|
|
* @adjust_flags: a combination of adjustment flags
|
|
|
|
|
*
|
|
|
|
|
* Setup the CRTC modesetting timing parameters for @p, adjusting if necessary.
|
|
|
|
|
*
|
|
|
|
|
* - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of
|
|
|
|
|
* interlaced modes.
|
|
|
|
|
* - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for
|
|
|
|
|
* buffers containing two eyes (only adjust the timings when needed, eg. for
|
|
|
|
|
* "frame packing" or "side by side full").
|
|
|
|
|
* - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not*
|
|
|
|
|
* be performed for doublescan and vscan > 1 modes respectively.
|
|
|
|
|
*/
|
|
|
|
|
void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
|
|
|
|
|
{
|
|
|
|
|
if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
if (p->flags & DRM_MODE_FLAG_DBLCLK)
|
|
|
|
|
p->crtc_clock = 2 * p->clock;
|
|
|
|
|
else
|
|
|
|
|
p->crtc_clock = p->clock;
|
|
|
|
|
p->crtc_hdisplay = p->hdisplay;
|
|
|
|
|
p->crtc_hsync_start = p->hsync_start;
|
|
|
|
|
p->crtc_hsync_end = p->hsync_end;
|
|
|
|
|
p->crtc_htotal = p->htotal;
|
|
|
|
|
p->crtc_hskew = p->hskew;
|
|
|
|
|
p->crtc_vdisplay = p->vdisplay;
|
|
|
|
|
p->crtc_vsync_start = p->vsync_start;
|
|
|
|
|
p->crtc_vsync_end = p->vsync_end;
|
|
|
|
|
p->crtc_vtotal = p->vtotal;
|
|
|
|
|
|
|
|
|
|
if (p->flags & DRM_MODE_FLAG_INTERLACE) {
|
|
|
|
|
if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
|
|
|
|
|
p->crtc_vdisplay /= 2;
|
|
|
|
|
p->crtc_vsync_start /= 2;
|
|
|
|
|
p->crtc_vsync_end /= 2;
|
|
|
|
|
p->crtc_vtotal /= 2;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (!(adjust_flags & CRTC_NO_DBLSCAN)) {
|
|
|
|
|
if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
|
|
|
|
|
p->crtc_vdisplay *= 2;
|
|
|
|
|
p->crtc_vsync_start *= 2;
|
|
|
|
|
p->crtc_vsync_end *= 2;
|
|
|
|
|
p->crtc_vtotal *= 2;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (!(adjust_flags & CRTC_NO_VSCAN)) {
|
|
|
|
|
if (p->vscan > 1) {
|
|
|
|
|
p->crtc_vdisplay *= p->vscan;
|
|
|
|
|
p->crtc_vsync_start *= p->vscan;
|
|
|
|
|
p->crtc_vsync_end *= p->vscan;
|
|
|
|
|
p->crtc_vtotal *= p->vscan;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (adjust_flags & CRTC_STEREO_DOUBLE) {
|
|
|
|
|
unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK;
|
|
|
|
|
|
|
|
|
|
switch (layout) {
|
|
|
|
|
case DRM_MODE_FLAG_3D_FRAME_PACKING:
|
|
|
|
|
p->crtc_clock *= 2;
|
|
|
|
|
p->crtc_vdisplay += p->crtc_vtotal;
|
|
|
|
|
p->crtc_vsync_start += p->crtc_vtotal;
|
|
|
|
|
p->crtc_vsync_end += p->crtc_vtotal;
|
|
|
|
|
p->crtc_vtotal += p->crtc_vtotal;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
|
|
|
|
|
p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
|
|
|
|
|
p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
|
|
|
|
|
p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
|
|
|
|
|
}
|
|
|
|
|
|
2018-07-13 01:09:39 +00:00
|
|
|
/**
|
|
|
|
|
* drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420
|
|
|
|
|
* output format
|
|
|
|
|
*
|
|
|
|
|
* @connector: drm connector under action.
|
|
|
|
|
* @mode: video mode to be tested.
|
|
|
|
|
*
|
|
|
|
|
* Returns:
|
|
|
|
|
* true if the mode can be supported in YCBCR420 format
|
|
|
|
|
* false if not.
|
|
|
|
|
*/
|
|
|
|
|
bool drm_mode_is_420_only(const struct drm_display_info *display,
|
|
|
|
|
struct drm_display_mode *mode)
|
|
|
|
|
{
|
|
|
|
|
u8 vic = drm_match_cea_mode(mode);
|
|
|
|
|
|
|
|
|
|
return test_bit(vic, display->hdmi.y420_vdb_modes);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* drm_mode_is_420_also - if a given videomode can be supported in YCBCR420
|
|
|
|
|
* output format also (along with RGB/YCBCR444/422)
|
|
|
|
|
*
|
|
|
|
|
* @display: display under action.
|
|
|
|
|
* @mode: video mode to be tested.
|
|
|
|
|
*
|
|
|
|
|
* Returns:
|
|
|
|
|
* true if the mode can be support YCBCR420 format
|
|
|
|
|
* false if not.
|
|
|
|
|
*/
|
|
|
|
|
bool drm_mode_is_420_also(const struct drm_display_info *display,
|
|
|
|
|
struct drm_display_mode *mode)
|
|
|
|
|
{
|
|
|
|
|
u8 vic = drm_match_cea_mode(mode);
|
|
|
|
|
|
|
|
|
|
return test_bit(vic, display->hdmi.y420_cmdb_modes);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* drm_mode_is_420 - if a given videomode can be supported in YCBCR420
|
|
|
|
|
* output format
|
|
|
|
|
*
|
|
|
|
|
* @display: display under action.
|
|
|
|
|
* @mode: video mode to be tested.
|
|
|
|
|
*
|
|
|
|
|
* Returns:
|
|
|
|
|
* true if the mode can be supported in YCBCR420 format
|
|
|
|
|
* false if not.
|
|
|
|
|
*/
|
|
|
|
|
bool drm_mode_is_420(const struct drm_display_info *display,
|
|
|
|
|
struct drm_display_mode *mode)
|
|
|
|
|
{
|
|
|
|
|
return drm_mode_is_420_only(display, mode) ||
|
|
|
|
|
drm_mode_is_420_also(display, mode);
|
|
|
|
|
}
|
|
|
|
|
|
2017-09-15 08:23:03 +00:00
|
|
|
static int display_get_timing(struct display_state *state)
|
|
|
|
|
{
|
|
|
|
|
struct connector_state *conn_state = &state->conn_state;
|
|
|
|
|
struct drm_display_mode *mode = &conn_state->mode;
|
|
|
|
|
const struct drm_display_mode *m;
|
2017-10-19 10:22:10 +00:00
|
|
|
struct panel_state *panel_state = &state->panel_state;
|
2018-03-16 02:52:59 +00:00
|
|
|
const struct rockchip_panel *panel = panel_state->panel;
|
2017-09-15 08:23:03 +00:00
|
|
|
|
2018-11-30 09:23:04 +00:00
|
|
|
if (dev_of_valid(panel->dev) &&
|
|
|
|
|
!display_get_timing_from_dts(panel_state, mode)) {
|
2017-09-15 08:23:03 +00:00
|
|
|
printf("Using display timing dts\n");
|
|
|
|
|
goto done;
|
|
|
|
|
}
|
|
|
|
|
|
2018-03-16 02:52:59 +00:00
|
|
|
if (panel->data) {
|
|
|
|
|
m = (const struct drm_display_mode *)panel->data;
|
2017-09-15 08:23:03 +00:00
|
|
|
memcpy(mode, m, sizeof(*m));
|
2018-03-16 02:52:59 +00:00
|
|
|
printf("Using display timing from compatible panel driver\n");
|
2017-09-15 08:23:03 +00:00
|
|
|
goto done;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
printf("failed to find display timing\n");
|
|
|
|
|
return -ENODEV;
|
|
|
|
|
done:
|
|
|
|
|
printf("Detailed mode clock %u kHz, flags[%x]\n"
|
|
|
|
|
" H: %04d %04d %04d %04d\n"
|
|
|
|
|
" V: %04d %04d %04d %04d\n"
|
|
|
|
|
"bus_format: %x\n",
|
|
|
|
|
mode->clock, mode->flags,
|
|
|
|
|
mode->hdisplay, mode->hsync_start,
|
|
|
|
|
mode->hsync_end, mode->htotal,
|
|
|
|
|
mode->vdisplay, mode->vsync_start,
|
|
|
|
|
mode->vsync_end, mode->vtotal,
|
|
|
|
|
conn_state->bus_format);
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int display_init(struct display_state *state)
|
|
|
|
|
{
|
|
|
|
|
struct connector_state *conn_state = &state->conn_state;
|
2018-11-30 09:23:04 +00:00
|
|
|
struct panel_state *panel_state = &state->panel_state;
|
2017-09-15 08:23:03 +00:00
|
|
|
const struct rockchip_connector *conn = conn_state->connector;
|
|
|
|
|
const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
|
|
|
|
|
struct crtc_state *crtc_state = &state->crtc_state;
|
2018-08-15 01:06:22 +00:00
|
|
|
struct rockchip_crtc *crtc = crtc_state->crtc;
|
2017-09-15 08:23:03 +00:00
|
|
|
const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
|
2017-12-13 11:35:59 +00:00
|
|
|
struct drm_display_mode *mode = &conn_state->mode;
|
2019-03-04 06:48:16 +00:00
|
|
|
int bpc;
|
2017-09-15 08:23:03 +00:00
|
|
|
int ret = 0;
|
2018-03-06 06:12:51 +00:00
|
|
|
static bool __print_once = false;
|
2017-09-15 08:23:03 +00:00
|
|
|
|
2018-03-06 06:12:51 +00:00
|
|
|
if (!__print_once) {
|
|
|
|
|
__print_once = true;
|
|
|
|
|
printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION);
|
|
|
|
|
}
|
2018-03-01 03:54:36 +00:00
|
|
|
|
2017-09-15 08:23:03 +00:00
|
|
|
if (state->is_init)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
if (!conn_funcs || !crtc_funcs) {
|
|
|
|
|
printf("failed to find connector or crtc functions\n");
|
|
|
|
|
return -ENXIO;
|
|
|
|
|
}
|
|
|
|
|
|
2018-12-18 12:17:40 +00:00
|
|
|
if (panel_state->panel)
|
|
|
|
|
rockchip_panel_init(panel_state->panel);
|
|
|
|
|
|
2017-09-15 08:23:03 +00:00
|
|
|
if (conn_funcs->init) {
|
|
|
|
|
ret = conn_funcs->init(state);
|
|
|
|
|
if (ret)
|
2017-10-19 10:22:10 +00:00
|
|
|
goto deinit;
|
2017-09-15 08:23:03 +00:00
|
|
|
}
|
2018-12-18 12:17:40 +00:00
|
|
|
|
|
|
|
|
if (conn_state->phy)
|
|
|
|
|
rockchip_phy_init(conn_state->phy);
|
|
|
|
|
|
2017-09-15 08:23:03 +00:00
|
|
|
/*
|
|
|
|
|
* support hotplug, but not connect;
|
|
|
|
|
*/
|
2018-08-15 01:06:22 +00:00
|
|
|
#ifdef CONFIG_ROCKCHIP_DRM_TVE
|
|
|
|
|
if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) {
|
|
|
|
|
printf("hdmi plugin ,skip tve\n");
|
|
|
|
|
goto deinit;
|
|
|
|
|
}
|
|
|
|
|
#elif defined(CONFIG_ROCKCHIP_DRM_RK1000)
|
|
|
|
|
if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) {
|
|
|
|
|
printf("hdmi plugin ,skip tve\n");
|
|
|
|
|
goto deinit;
|
|
|
|
|
}
|
|
|
|
|
#endif
|
2017-09-15 08:23:03 +00:00
|
|
|
if (conn_funcs->detect) {
|
|
|
|
|
ret = conn_funcs->detect(state);
|
2018-08-15 01:06:22 +00:00
|
|
|
#if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_ROCKCHIP_DRM_RK1000)
|
|
|
|
|
if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA)
|
|
|
|
|
crtc->hdmi_hpd = ret;
|
|
|
|
|
#endif
|
2017-09-15 08:23:03 +00:00
|
|
|
if (!ret)
|
|
|
|
|
goto deinit;
|
|
|
|
|
}
|
|
|
|
|
|
2019-03-04 06:48:16 +00:00
|
|
|
if (panel_state->panel) {
|
2017-09-15 08:23:03 +00:00
|
|
|
ret = display_get_timing(state);
|
2018-11-30 09:23:04 +00:00
|
|
|
} else if (conn_state->bridge) {
|
|
|
|
|
ret = video_bridge_read_edid(conn_state->bridge->dev,
|
|
|
|
|
conn_state->edid, EDID_SIZE);
|
|
|
|
|
if (ret > 0) {
|
|
|
|
|
ret = edid_get_drm_mode(conn_state->edid, ret, mode,
|
|
|
|
|
&bpc);
|
|
|
|
|
if (!ret)
|
|
|
|
|
edid_print_info((void *)&conn_state->edid);
|
2019-09-16 02:28:58 +00:00
|
|
|
} else {
|
|
|
|
|
ret = video_bridge_get_timing(conn_state->bridge->dev);
|
2018-11-30 09:23:04 +00:00
|
|
|
}
|
2019-03-04 06:48:16 +00:00
|
|
|
} else if (conn_funcs->get_timing) {
|
|
|
|
|
ret = conn_funcs->get_timing(state);
|
|
|
|
|
} else if (conn_funcs->get_edid) {
|
|
|
|
|
ret = conn_funcs->get_edid(state);
|
|
|
|
|
if (!ret) {
|
|
|
|
|
ret = edid_get_drm_mode((void *)&conn_state->edid,
|
|
|
|
|
sizeof(conn_state->edid), mode,
|
|
|
|
|
&bpc);
|
|
|
|
|
if (!ret)
|
|
|
|
|
edid_print_info((void *)&conn_state->edid);
|
|
|
|
|
}
|
2017-09-15 08:23:03 +00:00
|
|
|
}
|
2018-11-30 09:23:04 +00:00
|
|
|
|
|
|
|
|
if (ret)
|
|
|
|
|
goto deinit;
|
|
|
|
|
|
2017-12-13 11:35:59 +00:00
|
|
|
drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
|
2017-09-15 08:23:03 +00:00
|
|
|
|
|
|
|
|
if (crtc_funcs->init) {
|
|
|
|
|
ret = crtc_funcs->init(state);
|
|
|
|
|
if (ret)
|
|
|
|
|
goto deinit;
|
|
|
|
|
}
|
|
|
|
|
state->is_init = 1;
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
deinit:
|
|
|
|
|
if (conn_funcs->deinit)
|
|
|
|
|
conn_funcs->deinit(state);
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
2018-07-06 07:25:36 +00:00
|
|
|
int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val)
|
|
|
|
|
{
|
|
|
|
|
struct crtc_state *crtc_state = &state->crtc_state;
|
|
|
|
|
const struct rockchip_crtc *crtc = crtc_state->crtc;
|
|
|
|
|
const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
|
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
|
|
if (!state->is_init)
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
|
|
if (crtc_funcs->send_mcu_cmd) {
|
|
|
|
|
ret = crtc_funcs->send_mcu_cmd(state, type, val);
|
|
|
|
|
if (ret)
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2017-09-15 08:23:03 +00:00
|
|
|
static int display_set_plane(struct display_state *state)
|
|
|
|
|
{
|
|
|
|
|
struct crtc_state *crtc_state = &state->crtc_state;
|
|
|
|
|
const struct rockchip_crtc *crtc = crtc_state->crtc;
|
|
|
|
|
const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
|
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
|
|
if (!state->is_init)
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
|
|
if (crtc_funcs->set_plane) {
|
|
|
|
|
ret = crtc_funcs->set_plane(state);
|
|
|
|
|
if (ret)
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int display_enable(struct display_state *state)
|
|
|
|
|
{
|
|
|
|
|
struct connector_state *conn_state = &state->conn_state;
|
|
|
|
|
const struct rockchip_connector *conn = conn_state->connector;
|
|
|
|
|
const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
|
|
|
|
|
struct crtc_state *crtc_state = &state->crtc_state;
|
|
|
|
|
const struct rockchip_crtc *crtc = crtc_state->crtc;
|
|
|
|
|
const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
|
2018-12-18 12:17:40 +00:00
|
|
|
struct panel_state *panel_state = &state->panel_state;
|
2017-09-15 08:23:03 +00:00
|
|
|
|
|
|
|
|
display_init(state);
|
|
|
|
|
|
|
|
|
|
if (!state->is_init)
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
|
|
if (state->is_enable)
|
|
|
|
|
return 0;
|
|
|
|
|
|
2019-01-24 02:18:17 +00:00
|
|
|
if (crtc_funcs->prepare)
|
|
|
|
|
crtc_funcs->prepare(state);
|
2017-09-15 08:23:03 +00:00
|
|
|
|
2019-01-24 02:18:17 +00:00
|
|
|
if (conn_funcs->prepare)
|
|
|
|
|
conn_funcs->prepare(state);
|
2017-09-15 08:23:03 +00:00
|
|
|
|
2018-11-30 09:23:04 +00:00
|
|
|
if (conn_state->bridge)
|
|
|
|
|
rockchip_bridge_pre_enable(conn_state->bridge);
|
|
|
|
|
|
2018-12-18 12:17:40 +00:00
|
|
|
if (panel_state->panel)
|
|
|
|
|
rockchip_panel_prepare(panel_state->panel);
|
2017-09-15 08:23:03 +00:00
|
|
|
|
2019-01-24 02:18:17 +00:00
|
|
|
if (crtc_funcs->enable)
|
|
|
|
|
crtc_funcs->enable(state);
|
2017-09-15 08:23:03 +00:00
|
|
|
|
2019-01-24 02:18:17 +00:00
|
|
|
if (conn_funcs->enable)
|
|
|
|
|
conn_funcs->enable(state);
|
2017-09-15 08:23:03 +00:00
|
|
|
|
2018-11-30 09:23:04 +00:00
|
|
|
if (conn_state->bridge)
|
|
|
|
|
rockchip_bridge_enable(conn_state->bridge);
|
|
|
|
|
|
2018-12-18 12:17:40 +00:00
|
|
|
if (panel_state->panel)
|
|
|
|
|
rockchip_panel_enable(panel_state->panel);
|
2017-09-15 08:23:03 +00:00
|
|
|
|
|
|
|
|
state->is_enable = true;
|
2018-03-16 02:52:59 +00:00
|
|
|
|
2019-01-24 02:18:17 +00:00
|
|
|
return 0;
|
2017-09-15 08:23:03 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int display_disable(struct display_state *state)
|
|
|
|
|
{
|
|
|
|
|
struct connector_state *conn_state = &state->conn_state;
|
|
|
|
|
const struct rockchip_connector *conn = conn_state->connector;
|
|
|
|
|
const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
|
|
|
|
|
struct crtc_state *crtc_state = &state->crtc_state;
|
|
|
|
|
const struct rockchip_crtc *crtc = crtc_state->crtc;
|
|
|
|
|
const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
|
2018-12-18 12:17:40 +00:00
|
|
|
struct panel_state *panel_state = &state->panel_state;
|
2017-09-15 08:23:03 +00:00
|
|
|
|
|
|
|
|
if (!state->is_init)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
if (!state->is_enable)
|
|
|
|
|
return 0;
|
|
|
|
|
|
2018-12-18 12:17:40 +00:00
|
|
|
if (panel_state->panel)
|
|
|
|
|
rockchip_panel_disable(panel_state->panel);
|
2017-09-15 08:23:03 +00:00
|
|
|
|
2018-11-30 09:23:04 +00:00
|
|
|
if (conn_state->bridge)
|
|
|
|
|
rockchip_bridge_disable(conn_state->bridge);
|
2017-09-15 08:23:03 +00:00
|
|
|
|
|
|
|
|
if (conn_funcs->disable)
|
|
|
|
|
conn_funcs->disable(state);
|
|
|
|
|
|
2018-11-30 09:23:04 +00:00
|
|
|
if (crtc_funcs->disable)
|
|
|
|
|
crtc_funcs->disable(state);
|
|
|
|
|
|
2018-12-18 12:17:40 +00:00
|
|
|
if (panel_state->panel)
|
|
|
|
|
rockchip_panel_unprepare(panel_state->panel);
|
2017-09-15 08:23:03 +00:00
|
|
|
|
2018-11-30 09:23:04 +00:00
|
|
|
if (conn_state->bridge)
|
|
|
|
|
rockchip_bridge_post_disable(conn_state->bridge);
|
|
|
|
|
|
2017-09-15 08:23:03 +00:00
|
|
|
if (conn_funcs->unprepare)
|
|
|
|
|
conn_funcs->unprepare(state);
|
|
|
|
|
|
|
|
|
|
state->is_enable = 0;
|
|
|
|
|
state->is_init = 0;
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int display_logo(struct display_state *state)
|
|
|
|
|
{
|
|
|
|
|
struct crtc_state *crtc_state = &state->crtc_state;
|
|
|
|
|
struct connector_state *conn_state = &state->conn_state;
|
|
|
|
|
struct logo_info *logo = &state->logo;
|
|
|
|
|
int hdisplay, vdisplay;
|
|
|
|
|
|
|
|
|
|
display_init(state);
|
|
|
|
|
if (!state->is_init)
|
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
|
|
switch (logo->bpp) {
|
|
|
|
|
case 16:
|
|
|
|
|
crtc_state->format = ROCKCHIP_FMT_RGB565;
|
|
|
|
|
break;
|
|
|
|
|
case 24:
|
|
|
|
|
crtc_state->format = ROCKCHIP_FMT_RGB888;
|
|
|
|
|
break;
|
|
|
|
|
case 32:
|
|
|
|
|
crtc_state->format = ROCKCHIP_FMT_ARGB8888;
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
printf("can't support bmp bits[%d]\n", logo->bpp);
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
}
|
2018-11-30 03:25:21 +00:00
|
|
|
crtc_state->rb_swap = logo->bpp != 32;
|
2017-09-15 08:23:03 +00:00
|
|
|
hdisplay = conn_state->mode.hdisplay;
|
|
|
|
|
vdisplay = conn_state->mode.vdisplay;
|
|
|
|
|
crtc_state->src_w = logo->width;
|
|
|
|
|
crtc_state->src_h = logo->height;
|
|
|
|
|
crtc_state->src_x = 0;
|
|
|
|
|
crtc_state->src_y = 0;
|
|
|
|
|
crtc_state->ymirror = logo->ymirror;
|
|
|
|
|
|
2017-10-19 10:22:10 +00:00
|
|
|
crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset;
|
2017-09-15 08:23:03 +00:00
|
|
|
crtc_state->xvir = ALIGN(crtc_state->src_w * logo->bpp, 32) >> 5;
|
|
|
|
|
|
|
|
|
|
if (logo->mode == ROCKCHIP_DISPLAY_FULLSCREEN) {
|
|
|
|
|
crtc_state->crtc_x = 0;
|
|
|
|
|
crtc_state->crtc_y = 0;
|
|
|
|
|
crtc_state->crtc_w = hdisplay;
|
|
|
|
|
crtc_state->crtc_h = vdisplay;
|
|
|
|
|
} else {
|
|
|
|
|
if (crtc_state->src_w >= hdisplay) {
|
|
|
|
|
crtc_state->crtc_x = 0;
|
|
|
|
|
crtc_state->crtc_w = hdisplay;
|
|
|
|
|
} else {
|
|
|
|
|
crtc_state->crtc_x = (hdisplay - crtc_state->src_w) / 2;
|
|
|
|
|
crtc_state->crtc_w = crtc_state->src_w;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (crtc_state->src_h >= vdisplay) {
|
|
|
|
|
crtc_state->crtc_y = 0;
|
|
|
|
|
crtc_state->crtc_h = vdisplay;
|
|
|
|
|
} else {
|
|
|
|
|
crtc_state->crtc_y = (vdisplay - crtc_state->src_h) / 2;
|
|
|
|
|
crtc_state->crtc_h = crtc_state->src_h;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
display_set_plane(state);
|
|
|
|
|
display_enable(state);
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2018-02-06 13:31:18 +00:00
|
|
|
static int get_crtc_id(ofnode connect)
|
2017-09-15 08:23:03 +00:00
|
|
|
{
|
2018-02-06 13:31:18 +00:00
|
|
|
int phandle;
|
|
|
|
|
struct device_node *remote;
|
2017-09-15 08:23:03 +00:00
|
|
|
int val;
|
|
|
|
|
|
2018-02-06 13:31:18 +00:00
|
|
|
phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1);
|
2017-09-15 08:23:03 +00:00
|
|
|
if (phandle < 0)
|
|
|
|
|
goto err;
|
2018-02-06 13:31:18 +00:00
|
|
|
remote = of_find_node_by_phandle(phandle);
|
|
|
|
|
val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1);
|
2017-09-15 08:23:03 +00:00
|
|
|
if (val < 0)
|
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
|
|
return val;
|
|
|
|
|
err:
|
|
|
|
|
printf("Can't get crtc id, default set to id = 0\n");
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2018-07-06 07:25:36 +00:00
|
|
|
static int get_crtc_mcu_mode(struct crtc_state *crtc_state)
|
|
|
|
|
{
|
|
|
|
|
ofnode mcu_node;
|
|
|
|
|
int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend;
|
|
|
|
|
|
|
|
|
|
mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing");
|
2018-11-15 07:57:09 +00:00
|
|
|
if (!ofnode_valid(mcu_node))
|
|
|
|
|
return -ENODEV;
|
2018-07-06 07:25:36 +00:00
|
|
|
|
|
|
|
|
#define FDT_GET_MCU_INT(val, name) \
|
|
|
|
|
do { \
|
|
|
|
|
val = ofnode_read_s32_default(mcu_node, name, -1); \
|
|
|
|
|
if (val < 0) { \
|
|
|
|
|
printf("Can't get %s\n", name); \
|
|
|
|
|
return -ENXIO; \
|
|
|
|
|
} \
|
|
|
|
|
} while (0)
|
|
|
|
|
|
|
|
|
|
FDT_GET_MCU_INT(total_pixel, "mcu-pix-total");
|
|
|
|
|
FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst");
|
|
|
|
|
FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend");
|
|
|
|
|
FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst");
|
|
|
|
|
FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend");
|
|
|
|
|
|
|
|
|
|
crtc_state->mcu_timing.mcu_pix_total = total_pixel;
|
|
|
|
|
crtc_state->mcu_timing.mcu_cs_pst = cs_pst;
|
|
|
|
|
crtc_state->mcu_timing.mcu_cs_pend = cs_pend;
|
|
|
|
|
crtc_state->mcu_timing.mcu_rw_pst = rw_pst;
|
|
|
|
|
crtc_state->mcu_timing.mcu_rw_pend = rw_pend;
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2017-09-15 08:23:03 +00:00
|
|
|
struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp)
|
|
|
|
|
{
|
|
|
|
|
struct rockchip_logo_cache *tmp, *logo_cache = NULL;
|
|
|
|
|
|
|
|
|
|
list_for_each_entry(tmp, &logo_cache_list, head) {
|
|
|
|
|
if (!strcmp(tmp->name, bmp)) {
|
|
|
|
|
logo_cache = tmp;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (!logo_cache) {
|
|
|
|
|
logo_cache = malloc(sizeof(*logo_cache));
|
|
|
|
|
if (!logo_cache) {
|
|
|
|
|
printf("failed to alloc memory for logo cache\n");
|
|
|
|
|
return NULL;
|
|
|
|
|
}
|
|
|
|
|
memset(logo_cache, 0, sizeof(*logo_cache));
|
|
|
|
|
strcpy(logo_cache->name, bmp);
|
|
|
|
|
INIT_LIST_HEAD(&logo_cache->head);
|
|
|
|
|
list_add_tail(&logo_cache->head, &logo_cache_list);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return logo_cache;
|
|
|
|
|
}
|
|
|
|
|
|
2018-05-28 12:32:36 +00:00
|
|
|
/* Note: used only for rkfb kernel driver */
|
|
|
|
|
static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name)
|
|
|
|
|
{
|
|
|
|
|
#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
|
|
|
|
|
void *dst = NULL;
|
|
|
|
|
int len, size;
|
|
|
|
|
struct bmp_header *header;
|
|
|
|
|
|
|
|
|
|
if (!logo || !bmp_name)
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
|
|
header = malloc(RK_BLK_SIZE);
|
|
|
|
|
if (!header)
|
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
|
|
len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE);
|
|
|
|
|
if (len != RK_BLK_SIZE) {
|
|
|
|
|
free(header);
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
}
|
|
|
|
|
size = get_unaligned_le32(&header->file_size);
|
|
|
|
|
dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2);
|
|
|
|
|
len = rockchip_read_resource_file(dst, bmp_name, 0, size);
|
|
|
|
|
if (len != size) {
|
|
|
|
|
printf("failed to load bmp %s\n", bmp_name);
|
|
|
|
|
free(header);
|
|
|
|
|
return -ENOENT;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
logo->mem = dst;
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
2017-09-15 08:23:03 +00:00
|
|
|
static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
|
|
|
|
|
{
|
2017-10-19 10:22:10 +00:00
|
|
|
#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
|
2017-09-15 08:23:03 +00:00
|
|
|
struct rockchip_logo_cache *logo_cache;
|
|
|
|
|
struct bmp_header *header;
|
|
|
|
|
void *dst = NULL, *pdst;
|
2017-10-19 10:22:10 +00:00
|
|
|
int size, len;
|
|
|
|
|
int ret = 0;
|
2019-03-28 07:26:28 +00:00
|
|
|
int reserved = 0;
|
2017-09-15 08:23:03 +00:00
|
|
|
|
|
|
|
|
if (!logo || !bmp_name)
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
logo_cache = find_or_alloc_logo_cache(bmp_name);
|
|
|
|
|
if (!logo_cache)
|
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
|
|
if (logo_cache->logo.mem) {
|
|
|
|
|
memcpy(logo, &logo_cache->logo, sizeof(*logo));
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2017-10-19 10:22:10 +00:00
|
|
|
header = malloc(RK_BLK_SIZE);
|
2017-09-15 08:23:03 +00:00
|
|
|
if (!header)
|
2017-10-19 10:22:10 +00:00
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
|
|
len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE);
|
|
|
|
|
if (len != RK_BLK_SIZE) {
|
|
|
|
|
ret = -EINVAL;
|
|
|
|
|
goto free_header;
|
|
|
|
|
}
|
2017-09-15 08:23:03 +00:00
|
|
|
|
|
|
|
|
logo->bpp = get_unaligned_le16(&header->bit_count);
|
|
|
|
|
logo->width = get_unaligned_le32(&header->width);
|
|
|
|
|
logo->height = get_unaligned_le32(&header->height);
|
2019-03-28 07:26:28 +00:00
|
|
|
reserved = get_unaligned_le32(&header->reserved);
|
|
|
|
|
if (logo->height < 0)
|
|
|
|
|
logo->height = -logo->height;
|
2018-09-26 01:17:18 +00:00
|
|
|
size = get_unaligned_le32(&header->file_size);
|
2018-11-30 03:25:21 +00:00
|
|
|
if (!can_direct_logo(logo->bpp)) {
|
|
|
|
|
if (size > MEMORY_POOL_SIZE) {
|
|
|
|
|
printf("failed to use boot buf as temp bmp buffer\n");
|
|
|
|
|
ret = -ENOMEM;
|
|
|
|
|
goto free_header;
|
|
|
|
|
}
|
|
|
|
|
pdst = get_display_buffer(size);
|
2017-09-15 08:23:03 +00:00
|
|
|
|
2018-11-30 03:25:21 +00:00
|
|
|
} else {
|
|
|
|
|
pdst = get_display_buffer(size);
|
|
|
|
|
dst = pdst;
|
|
|
|
|
}
|
2018-09-26 01:17:18 +00:00
|
|
|
|
2017-10-19 10:22:10 +00:00
|
|
|
len = rockchip_read_resource_file(pdst, bmp_name, 0, size);
|
|
|
|
|
if (len != size) {
|
2017-09-15 08:23:03 +00:00
|
|
|
printf("failed to load bmp %s\n", bmp_name);
|
2017-10-19 10:22:10 +00:00
|
|
|
ret = -ENOENT;
|
|
|
|
|
goto free_header;
|
2017-09-15 08:23:03 +00:00
|
|
|
}
|
2018-11-30 03:25:10 +00:00
|
|
|
|
2018-11-30 03:25:21 +00:00
|
|
|
if (!can_direct_logo(logo->bpp)) {
|
2017-09-15 08:23:03 +00:00
|
|
|
int dst_size;
|
|
|
|
|
/*
|
|
|
|
|
* TODO: force use 16bpp if bpp less than 16;
|
|
|
|
|
*/
|
|
|
|
|
logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp;
|
|
|
|
|
dst_size = logo->width * logo->height * logo->bpp >> 3;
|
2018-11-30 03:25:10 +00:00
|
|
|
|
2017-09-15 08:23:03 +00:00
|
|
|
dst = get_display_buffer(dst_size);
|
2017-10-19 10:22:10 +00:00
|
|
|
if (!dst) {
|
|
|
|
|
ret = -ENOMEM;
|
|
|
|
|
goto free_header;
|
|
|
|
|
}
|
2018-11-30 03:25:10 +00:00
|
|
|
if (bmpdecoder(pdst, dst, logo->bpp)) {
|
2017-09-15 08:23:03 +00:00
|
|
|
printf("failed to decode bmp %s\n", bmp_name);
|
2017-10-19 10:22:10 +00:00
|
|
|
ret = -EINVAL;
|
|
|
|
|
goto free_header;
|
2017-09-15 08:23:03 +00:00
|
|
|
}
|
2017-10-19 10:22:10 +00:00
|
|
|
flush_dcache_range((ulong)dst,
|
|
|
|
|
ALIGN((ulong)dst + dst_size,
|
|
|
|
|
CONFIG_SYS_CACHELINE_SIZE));
|
2018-11-30 03:25:10 +00:00
|
|
|
|
2017-09-15 08:23:03 +00:00
|
|
|
logo->offset = 0;
|
2018-11-30 03:25:10 +00:00
|
|
|
logo->ymirror = 0;
|
2017-09-15 08:23:03 +00:00
|
|
|
} else {
|
|
|
|
|
logo->offset = get_unaligned_le32(&header->data_offset);
|
2019-03-28 07:26:28 +00:00
|
|
|
if (reserved == BMP_PROCESSED_FLAG)
|
|
|
|
|
logo->ymirror = 0;
|
|
|
|
|
else
|
|
|
|
|
logo->ymirror = 1;
|
2017-09-15 08:23:03 +00:00
|
|
|
}
|
2017-10-19 10:22:10 +00:00
|
|
|
logo->mem = dst;
|
2017-09-15 08:23:03 +00:00
|
|
|
|
|
|
|
|
memcpy(&logo_cache->logo, logo, sizeof(*logo));
|
|
|
|
|
|
2017-10-19 10:22:10 +00:00
|
|
|
free_header:
|
|
|
|
|
|
|
|
|
|
free(header);
|
|
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
|
#else
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
#endif
|
2017-09-15 08:23:03 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void rockchip_show_fbbase(ulong fbbase)
|
|
|
|
|
{
|
|
|
|
|
struct display_state *s;
|
|
|
|
|
|
|
|
|
|
list_for_each_entry(s, &rockchip_display_list, head) {
|
|
|
|
|
s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN;
|
2017-10-19 10:22:10 +00:00
|
|
|
s->logo.mem = (char *)fbbase;
|
2017-09-15 08:23:03 +00:00
|
|
|
s->logo.width = DRM_ROCKCHIP_FB_WIDTH;
|
|
|
|
|
s->logo.height = DRM_ROCKCHIP_FB_HEIGHT;
|
|
|
|
|
s->logo.bpp = 32;
|
|
|
|
|
s->logo.ymirror = 0;
|
|
|
|
|
|
|
|
|
|
display_logo(s);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2019-07-23 00:46:25 +00:00
|
|
|
int rockchip_show_bmp(const char *bmp)
|
2017-09-15 08:23:03 +00:00
|
|
|
{
|
|
|
|
|
struct display_state *s;
|
2019-07-23 00:46:25 +00:00
|
|
|
int ret = 0;
|
2017-09-15 08:23:03 +00:00
|
|
|
|
|
|
|
|
if (!bmp) {
|
|
|
|
|
list_for_each_entry(s, &rockchip_display_list, head)
|
|
|
|
|
display_disable(s);
|
2019-07-23 00:46:25 +00:00
|
|
|
return -ENOENT;
|
2017-09-15 08:23:03 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
list_for_each_entry(s, &rockchip_display_list, head) {
|
|
|
|
|
s->logo.mode = s->charge_logo_mode;
|
|
|
|
|
if (load_bmp_logo(&s->logo, bmp))
|
|
|
|
|
continue;
|
2019-07-23 00:46:25 +00:00
|
|
|
ret = display_logo(s);
|
2017-09-15 08:23:03 +00:00
|
|
|
}
|
2019-07-23 00:46:25 +00:00
|
|
|
|
|
|
|
|
return ret;
|
2017-09-15 08:23:03 +00:00
|
|
|
}
|
|
|
|
|
|
2019-07-23 00:46:25 +00:00
|
|
|
int rockchip_show_logo(void)
|
2017-09-15 08:23:03 +00:00
|
|
|
{
|
|
|
|
|
struct display_state *s;
|
2019-07-23 00:46:25 +00:00
|
|
|
int ret = 0;
|
2017-09-15 08:23:03 +00:00
|
|
|
|
|
|
|
|
list_for_each_entry(s, &rockchip_display_list, head) {
|
|
|
|
|
s->logo.mode = s->logo_mode;
|
|
|
|
|
if (load_bmp_logo(&s->logo, s->ulogo_name))
|
|
|
|
|
printf("failed to display uboot logo\n");
|
|
|
|
|
else
|
2019-07-23 00:46:25 +00:00
|
|
|
ret = display_logo(s);
|
2018-05-28 12:32:36 +00:00
|
|
|
|
|
|
|
|
/* Load kernel bmp in rockchip_display_fixup() later */
|
2017-09-15 08:23:03 +00:00
|
|
|
}
|
2019-07-23 00:46:25 +00:00
|
|
|
|
|
|
|
|
return ret;
|
2017-09-15 08:23:03 +00:00
|
|
|
}
|
|
|
|
|
|
2018-11-30 09:23:04 +00:00
|
|
|
enum {
|
|
|
|
|
PORT_DIR_IN,
|
|
|
|
|
PORT_DIR_OUT,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static struct rockchip_panel *rockchip_of_find_panel(struct udevice *dev)
|
|
|
|
|
{
|
|
|
|
|
ofnode panel_node, ports, port, ep;
|
|
|
|
|
struct udevice *panel_dev;
|
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
|
|
panel_node = dev_read_subnode(dev, "panel");
|
|
|
|
|
if (ofnode_valid(panel_node) && ofnode_is_available(panel_node)) {
|
|
|
|
|
ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_node,
|
|
|
|
|
&panel_dev);
|
|
|
|
|
if (!ret)
|
|
|
|
|
goto found;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
ports = dev_read_subnode(dev, "ports");
|
|
|
|
|
if (!ofnode_valid(ports))
|
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
|
|
ofnode_for_each_subnode(port, ports) {
|
|
|
|
|
u32 reg;
|
|
|
|
|
|
|
|
|
|
if (ofnode_read_u32(port, "reg", ®))
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
if (reg != PORT_DIR_OUT)
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
ofnode_for_each_subnode(ep, port) {
|
|
|
|
|
ofnode _ep, _port;
|
|
|
|
|
uint phandle;
|
|
|
|
|
|
|
|
|
|
if (ofnode_read_u32(ep, "remote-endpoint", &phandle))
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
_ep = ofnode_get_by_phandle(phandle);
|
|
|
|
|
if (!ofnode_valid(_ep))
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
_port = ofnode_get_parent(_ep);
|
|
|
|
|
if (!ofnode_valid(_port))
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
panel_node = ofnode_get_parent(_port);
|
|
|
|
|
if (!ofnode_valid(panel_node))
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
ret = uclass_get_device_by_ofnode(UCLASS_PANEL,
|
|
|
|
|
panel_node,
|
|
|
|
|
&panel_dev);
|
|
|
|
|
if (!ret)
|
|
|
|
|
goto found;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
|
|
found:
|
|
|
|
|
return (struct rockchip_panel *)dev_get_driver_data(panel_dev);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static struct rockchip_bridge *rockchip_of_find_bridge(struct udevice *conn_dev)
|
|
|
|
|
{
|
|
|
|
|
ofnode node, ports, port, ep;
|
|
|
|
|
struct udevice *dev;
|
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
|
|
ports = dev_read_subnode(conn_dev, "ports");
|
|
|
|
|
if (!ofnode_valid(ports))
|
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
|
|
ofnode_for_each_subnode(port, ports) {
|
|
|
|
|
u32 reg;
|
|
|
|
|
|
|
|
|
|
if (ofnode_read_u32(port, "reg", ®))
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
if (reg != PORT_DIR_OUT)
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
ofnode_for_each_subnode(ep, port) {
|
|
|
|
|
ofnode _ep, _port, _ports;
|
|
|
|
|
uint phandle;
|
|
|
|
|
|
|
|
|
|
if (ofnode_read_u32(ep, "remote-endpoint", &phandle))
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
_ep = ofnode_get_by_phandle(phandle);
|
|
|
|
|
if (!ofnode_valid(_ep))
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
_port = ofnode_get_parent(_ep);
|
|
|
|
|
if (!ofnode_valid(_port))
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
_ports = ofnode_get_parent(_port);
|
|
|
|
|
if (!ofnode_valid(_ports))
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
node = ofnode_get_parent(_ports);
|
|
|
|
|
if (!ofnode_valid(node))
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE,
|
|
|
|
|
node, &dev);
|
|
|
|
|
if (!ret)
|
|
|
|
|
goto found;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
|
|
found:
|
|
|
|
|
return (struct rockchip_bridge *)dev_get_driver_data(dev);
|
|
|
|
|
}
|
|
|
|
|
|
2018-09-03 01:39:48 +00:00
|
|
|
static struct udevice *rockchip_of_find_connector(ofnode endpoint)
|
2018-08-17 06:25:27 +00:00
|
|
|
{
|
2018-09-03 01:39:48 +00:00
|
|
|
ofnode ep, port, ports, conn;
|
|
|
|
|
uint phandle;
|
|
|
|
|
struct udevice *dev;
|
2018-08-17 06:25:27 +00:00
|
|
|
int ret;
|
|
|
|
|
|
2018-09-03 01:39:48 +00:00
|
|
|
if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle))
|
2018-08-17 06:25:27 +00:00
|
|
|
return NULL;
|
|
|
|
|
|
2018-09-03 01:39:48 +00:00
|
|
|
ep = ofnode_get_by_phandle(phandle);
|
|
|
|
|
if (!ofnode_valid(ep) || !ofnode_is_available(ep))
|
|
|
|
|
return NULL;
|
2018-08-17 06:25:27 +00:00
|
|
|
|
2018-09-03 01:39:48 +00:00
|
|
|
port = ofnode_get_parent(ep);
|
|
|
|
|
if (!ofnode_valid(port))
|
|
|
|
|
return NULL;
|
2018-08-17 06:25:27 +00:00
|
|
|
|
2018-09-03 01:39:48 +00:00
|
|
|
ports = ofnode_get_parent(port);
|
|
|
|
|
if (!ofnode_valid(ports))
|
|
|
|
|
return NULL;
|
2018-08-17 06:25:27 +00:00
|
|
|
|
2018-09-03 01:39:48 +00:00
|
|
|
conn = ofnode_get_parent(ports);
|
|
|
|
|
if (!ofnode_valid(conn) || !ofnode_is_available(conn))
|
|
|
|
|
return NULL;
|
2018-08-17 06:25:27 +00:00
|
|
|
|
2018-09-03 01:39:48 +00:00
|
|
|
ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev);
|
|
|
|
|
if (ret)
|
|
|
|
|
return NULL;
|
2018-08-17 06:25:27 +00:00
|
|
|
|
2018-09-03 01:39:48 +00:00
|
|
|
return dev;
|
2018-08-17 06:25:27 +00:00
|
|
|
}
|
|
|
|
|
|
2018-12-18 12:17:40 +00:00
|
|
|
static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev)
|
|
|
|
|
{
|
|
|
|
|
struct udevice *phy_dev;
|
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
|
|
ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev);
|
|
|
|
|
if (ret)
|
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
|
|
return (struct rockchip_phy *)dev_get_driver_data(phy_dev);
|
|
|
|
|
}
|
|
|
|
|
|
2017-09-15 08:23:03 +00:00
|
|
|
static int rockchip_display_probe(struct udevice *dev)
|
|
|
|
|
{
|
|
|
|
|
struct video_priv *uc_priv = dev_get_uclass_priv(dev);
|
|
|
|
|
struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
|
|
|
|
|
const void *blob = gd->fdt_blob;
|
2018-02-06 13:31:18 +00:00
|
|
|
int phandle;
|
2017-09-15 08:23:03 +00:00
|
|
|
struct udevice *crtc_dev, *conn_dev;
|
2018-08-15 01:06:22 +00:00
|
|
|
struct rockchip_crtc *crtc;
|
2017-09-15 08:23:03 +00:00
|
|
|
const struct rockchip_connector *conn;
|
2018-11-30 09:23:04 +00:00
|
|
|
struct rockchip_panel *panel = NULL;
|
|
|
|
|
struct rockchip_bridge *bridge = NULL;
|
2018-12-18 12:17:40 +00:00
|
|
|
struct rockchip_phy *phy = NULL;
|
2017-09-15 08:23:03 +00:00
|
|
|
struct display_state *s;
|
|
|
|
|
const char *name;
|
|
|
|
|
int ret;
|
2018-02-06 13:31:18 +00:00
|
|
|
ofnode node, route_node;
|
|
|
|
|
struct device_node *port_node, *vop_node, *ep_node;
|
2018-08-15 01:06:22 +00:00
|
|
|
struct public_phy_data *data;
|
2017-09-15 08:23:03 +00:00
|
|
|
|
|
|
|
|
/* Before relocation we don't need to do anything */
|
|
|
|
|
if (!(gd->flags & GD_FLG_RELOC))
|
|
|
|
|
return 0;
|
2018-08-15 01:06:22 +00:00
|
|
|
|
|
|
|
|
data = malloc(sizeof(struct public_phy_data));
|
|
|
|
|
if (!data) {
|
|
|
|
|
printf("failed to alloc phy data\n");
|
|
|
|
|
return -ENOMEM;
|
|
|
|
|
}
|
|
|
|
|
data->phy_init = false;
|
|
|
|
|
|
2017-10-19 10:22:10 +00:00
|
|
|
init_display_buffer(plat->base);
|
2017-09-15 08:23:03 +00:00
|
|
|
|
2018-02-06 13:31:18 +00:00
|
|
|
route_node = dev_read_subnode(dev, "route");
|
|
|
|
|
if (!ofnode_valid(route_node))
|
|
|
|
|
return -ENODEV;
|
2017-09-15 08:23:03 +00:00
|
|
|
|
2018-02-26 02:14:27 +00:00
|
|
|
ofnode_for_each_subnode(node, route_node) {
|
|
|
|
|
if (!ofnode_is_available(node))
|
|
|
|
|
continue;
|
2018-02-06 13:31:18 +00:00
|
|
|
phandle = ofnode_read_u32_default(node, "connect", -1);
|
2017-09-15 08:23:03 +00:00
|
|
|
if (phandle < 0) {
|
2018-02-06 13:31:18 +00:00
|
|
|
printf("Warn: can't find connect node's handle\n");
|
2017-09-15 08:23:03 +00:00
|
|
|
continue;
|
|
|
|
|
}
|
2018-02-06 13:31:18 +00:00
|
|
|
ep_node = of_find_node_by_phandle(phandle);
|
|
|
|
|
if (!ofnode_valid(np_to_ofnode(ep_node))) {
|
|
|
|
|
printf("Warn: can't find endpoint node from phandle\n");
|
2017-09-15 08:23:03 +00:00
|
|
|
continue;
|
|
|
|
|
}
|
2018-02-06 13:31:18 +00:00
|
|
|
port_node = of_get_parent(ep_node);
|
|
|
|
|
if (!ofnode_valid(np_to_ofnode(port_node))) {
|
|
|
|
|
printf("Warn: can't find port node from phandle\n");
|
2017-09-15 08:23:03 +00:00
|
|
|
continue;
|
|
|
|
|
}
|
2018-02-06 13:31:18 +00:00
|
|
|
vop_node = of_get_parent(port_node);
|
|
|
|
|
if (!ofnode_valid(np_to_ofnode(vop_node))) {
|
|
|
|
|
printf("Warn: can't find crtc node from phandle\n");
|
|
|
|
|
continue;
|
|
|
|
|
}
|
|
|
|
|
ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC,
|
|
|
|
|
np_to_ofnode(vop_node),
|
|
|
|
|
&crtc_dev);
|
2017-09-15 08:23:03 +00:00
|
|
|
if (ret) {
|
2018-02-09 12:19:58 +00:00
|
|
|
printf("Warn: can't find crtc driver %d\n", ret);
|
2017-09-15 08:23:03 +00:00
|
|
|
continue;
|
|
|
|
|
}
|
2018-08-15 01:06:22 +00:00
|
|
|
crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev);
|
2017-09-15 08:23:03 +00:00
|
|
|
|
2018-09-03 01:39:48 +00:00
|
|
|
conn_dev = rockchip_of_find_connector(np_to_ofnode(ep_node));
|
2018-08-17 06:25:27 +00:00
|
|
|
if (!conn_dev) {
|
2018-02-06 13:31:18 +00:00
|
|
|
printf("Warn: can't find connect driver\n");
|
2017-09-15 08:23:03 +00:00
|
|
|
continue;
|
|
|
|
|
}
|
2018-08-17 06:25:27 +00:00
|
|
|
|
2017-09-15 08:23:03 +00:00
|
|
|
conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev);
|
|
|
|
|
|
2018-12-18 12:17:40 +00:00
|
|
|
phy = rockchip_of_find_phy(conn_dev);
|
|
|
|
|
|
2018-11-30 09:23:04 +00:00
|
|
|
bridge = rockchip_of_find_bridge(conn_dev);
|
|
|
|
|
if (bridge)
|
|
|
|
|
panel = rockchip_of_find_panel(bridge->dev);
|
|
|
|
|
else
|
|
|
|
|
panel = rockchip_of_find_panel(conn_dev);
|
|
|
|
|
|
2017-09-15 08:23:03 +00:00
|
|
|
s = malloc(sizeof(*s));
|
|
|
|
|
if (!s)
|
2017-10-19 10:22:10 +00:00
|
|
|
continue;
|
2017-09-15 08:23:03 +00:00
|
|
|
|
|
|
|
|
memset(s, 0, sizeof(*s));
|
|
|
|
|
|
|
|
|
|
INIT_LIST_HEAD(&s->head);
|
2018-08-17 03:02:23 +00:00
|
|
|
ret = ofnode_read_string_index(node, "logo,uboot", 0, &name);
|
|
|
|
|
if (!ret)
|
|
|
|
|
memcpy(s->ulogo_name, name, strlen(name));
|
|
|
|
|
ret = ofnode_read_string_index(node, "logo,kernel", 0, &name);
|
|
|
|
|
if (!ret)
|
|
|
|
|
memcpy(s->klogo_name, name, strlen(name));
|
2018-02-06 13:31:18 +00:00
|
|
|
ret = ofnode_read_string_index(node, "logo,mode", 0, &name);
|
2017-09-15 08:23:03 +00:00
|
|
|
if (!strcmp(name, "fullscreen"))
|
|
|
|
|
s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
|
|
|
|
|
else
|
|
|
|
|
s->logo_mode = ROCKCHIP_DISPLAY_CENTER;
|
2018-02-06 13:31:18 +00:00
|
|
|
ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name);
|
2017-09-15 08:23:03 +00:00
|
|
|
if (!strcmp(name, "fullscreen"))
|
|
|
|
|
s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
|
|
|
|
|
else
|
|
|
|
|
s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER;
|
|
|
|
|
|
|
|
|
|
s->blob = blob;
|
2018-11-30 09:23:04 +00:00
|
|
|
s->panel_state.panel = panel;
|
2018-08-17 06:25:27 +00:00
|
|
|
s->conn_state.node = conn_dev->node;
|
2017-09-15 08:23:03 +00:00
|
|
|
s->conn_state.dev = conn_dev;
|
|
|
|
|
s->conn_state.connector = conn;
|
2018-12-18 12:17:40 +00:00
|
|
|
s->conn_state.phy = phy;
|
2018-11-30 09:23:04 +00:00
|
|
|
s->conn_state.bridge = bridge;
|
2018-01-18 11:41:55 +00:00
|
|
|
s->conn_state.overscan.left_margin = 100;
|
|
|
|
|
s->conn_state.overscan.right_margin = 100;
|
|
|
|
|
s->conn_state.overscan.top_margin = 100;
|
|
|
|
|
s->conn_state.overscan.bottom_margin = 100;
|
2018-02-06 13:31:18 +00:00
|
|
|
s->crtc_state.node = np_to_ofnode(vop_node);
|
2017-09-15 08:23:03 +00:00
|
|
|
s->crtc_state.dev = crtc_dev;
|
|
|
|
|
s->crtc_state.crtc = crtc;
|
2018-02-06 13:31:18 +00:00
|
|
|
s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node));
|
|
|
|
|
s->node = node;
|
2018-11-30 09:23:04 +00:00
|
|
|
|
|
|
|
|
if (bridge)
|
|
|
|
|
bridge->state = s;
|
|
|
|
|
|
2018-12-18 12:17:40 +00:00
|
|
|
if (panel)
|
|
|
|
|
panel->state = s;
|
|
|
|
|
|
2018-07-06 07:25:36 +00:00
|
|
|
get_crtc_mcu_mode(&s->crtc_state);
|
2017-09-15 08:23:03 +00:00
|
|
|
|
2018-02-06 13:31:18 +00:00
|
|
|
if (connector_panel_init(s)) {
|
|
|
|
|
printf("Warn: Failed to init panel drivers\n");
|
2017-10-19 10:22:10 +00:00
|
|
|
free(s);
|
|
|
|
|
continue;
|
|
|
|
|
}
|
|
|
|
|
|
2018-08-15 01:06:22 +00:00
|
|
|
if (connector_phy_init(s, data)) {
|
2018-02-06 13:31:18 +00:00
|
|
|
printf("Warn: Failed to init phy drivers\n");
|
2017-10-19 10:22:10 +00:00
|
|
|
free(s);
|
|
|
|
|
continue;
|
|
|
|
|
}
|
2017-09-15 08:23:03 +00:00
|
|
|
list_add_tail(&s->head, &rockchip_display_list);
|
|
|
|
|
}
|
|
|
|
|
|
2017-10-19 10:22:10 +00:00
|
|
|
if (list_empty(&rockchip_display_list)) {
|
|
|
|
|
printf("Failed to found available display route\n");
|
|
|
|
|
return -ENODEV;
|
|
|
|
|
}
|
|
|
|
|
|
2017-09-15 08:23:03 +00:00
|
|
|
uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH;
|
|
|
|
|
uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT;
|
|
|
|
|
uc_priv->bpix = VIDEO_BPP32;
|
|
|
|
|
|
2017-10-19 10:22:10 +00:00
|
|
|
#ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER
|
2017-09-15 08:23:03 +00:00
|
|
|
rockchip_show_fbbase(plat->base);
|
|
|
|
|
video_set_flush_dcache(dev, true);
|
2017-10-19 10:22:10 +00:00
|
|
|
#endif
|
2017-09-15 08:23:03 +00:00
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
2017-10-19 10:22:10 +00:00
|
|
|
|
2017-09-15 08:23:03 +00:00
|
|
|
void rockchip_display_fixup(void *blob)
|
|
|
|
|
{
|
|
|
|
|
const struct rockchip_connector_funcs *conn_funcs;
|
|
|
|
|
const struct rockchip_crtc_funcs *crtc_funcs;
|
|
|
|
|
const struct rockchip_connector *conn;
|
|
|
|
|
const struct rockchip_crtc *crtc;
|
|
|
|
|
struct display_state *s;
|
2018-05-28 09:54:11 +00:00
|
|
|
int offset;
|
2018-02-22 09:35:17 +00:00
|
|
|
const struct device_node *np;
|
|
|
|
|
const char *path;
|
2017-09-15 08:23:03 +00:00
|
|
|
|
|
|
|
|
if (!get_display_size())
|
|
|
|
|
return;
|
|
|
|
|
|
2018-05-28 12:32:36 +00:00
|
|
|
if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) {
|
|
|
|
|
list_for_each_entry(s, &rockchip_display_list, head)
|
|
|
|
|
load_bmp_logo(&s->logo, s->klogo_name);
|
|
|
|
|
offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo",
|
|
|
|
|
(u64)memory_start,
|
|
|
|
|
(u64)get_display_size());
|
|
|
|
|
if (offset < 0)
|
|
|
|
|
printf("failed to reserve drm-loader-logo memory\n");
|
|
|
|
|
} else {
|
|
|
|
|
printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n");
|
2018-05-28 09:54:11 +00:00
|
|
|
/* Compatible with rkfb display, only need reserve memory */
|
|
|
|
|
offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo",
|
2018-05-28 12:32:36 +00:00
|
|
|
(u64)memory_start,
|
|
|
|
|
MEMORY_POOL_SIZE);
|
2018-05-28 09:54:11 +00:00
|
|
|
if (offset < 0)
|
2018-05-28 12:32:36 +00:00
|
|
|
printf("failed to reserve fb-loader-logo memory\n");
|
|
|
|
|
else
|
|
|
|
|
list_for_each_entry(s, &rockchip_display_list, head)
|
|
|
|
|
load_kernel_bmp_logo(&s->logo, s->klogo_name);
|
2017-09-15 08:23:03 +00:00
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
list_for_each_entry(s, &rockchip_display_list, head) {
|
|
|
|
|
conn = s->conn_state.connector;
|
|
|
|
|
if (!conn)
|
|
|
|
|
continue;
|
|
|
|
|
conn_funcs = conn->funcs;
|
|
|
|
|
if (!conn_funcs) {
|
|
|
|
|
printf("failed to get exist connector\n");
|
|
|
|
|
continue;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
crtc = s->crtc_state.crtc;
|
|
|
|
|
if (!crtc)
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
crtc_funcs = crtc->funcs;
|
|
|
|
|
if (!crtc_funcs) {
|
|
|
|
|
printf("failed to get exist crtc\n");
|
|
|
|
|
continue;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (crtc_funcs->fixup_dts)
|
|
|
|
|
crtc_funcs->fixup_dts(s, blob);
|
|
|
|
|
|
|
|
|
|
if (conn_funcs->fixup_dts)
|
|
|
|
|
conn_funcs->fixup_dts(s, blob);
|
|
|
|
|
|
2018-02-22 09:35:17 +00:00
|
|
|
np = ofnode_to_np(s->node);
|
|
|
|
|
path = np->full_name;
|
|
|
|
|
fdt_increase_size(blob, 0x400);
|
2017-09-15 08:23:03 +00:00
|
|
|
#define FDT_SET_U32(name, val) \
|
|
|
|
|
do_fixup_by_path_u32(blob, path, name, val, 1);
|
|
|
|
|
|
2018-02-22 09:35:17 +00:00
|
|
|
offset = s->logo.offset + (u32)(unsigned long)s->logo.mem
|
|
|
|
|
- memory_start;
|
2017-09-15 08:23:03 +00:00
|
|
|
FDT_SET_U32("logo,offset", offset);
|
|
|
|
|
FDT_SET_U32("logo,width", s->logo.width);
|
|
|
|
|
FDT_SET_U32("logo,height", s->logo.height);
|
|
|
|
|
FDT_SET_U32("logo,bpp", s->logo.bpp);
|
|
|
|
|
FDT_SET_U32("logo,ymirror", s->logo.ymirror);
|
|
|
|
|
FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay);
|
|
|
|
|
FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay);
|
2018-01-26 11:33:31 +00:00
|
|
|
FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end);
|
|
|
|
|
FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end);
|
2017-09-15 08:23:03 +00:00
|
|
|
FDT_SET_U32("video,vrefresh",
|
|
|
|
|
drm_mode_vrefresh(&s->conn_state.mode));
|
2018-01-18 11:41:55 +00:00
|
|
|
FDT_SET_U32("video,flags", s->conn_state.mode.flags);
|
2019-08-29 09:38:34 +00:00
|
|
|
FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio);
|
2018-01-18 11:41:55 +00:00
|
|
|
FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin);
|
|
|
|
|
FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin);
|
|
|
|
|
FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin);
|
|
|
|
|
FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin);
|
2017-09-15 08:23:03 +00:00
|
|
|
#undef FDT_SET_U32
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int rockchip_display_bind(struct udevice *dev)
|
|
|
|
|
{
|
|
|
|
|
struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
|
|
|
|
|
|
2017-10-19 10:22:10 +00:00
|
|
|
plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE;
|
2017-09-15 08:23:03 +00:00
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static const struct udevice_id rockchip_display_ids[] = {
|
|
|
|
|
{ .compatible = "rockchip,display-subsystem" },
|
|
|
|
|
{ }
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
U_BOOT_DRIVER(rockchip_display) = {
|
|
|
|
|
.name = "rockchip_display",
|
|
|
|
|
.id = UCLASS_VIDEO,
|
|
|
|
|
.of_match = rockchip_display_ids,
|
|
|
|
|
.bind = rockchip_display_bind,
|
|
|
|
|
.probe = rockchip_display_probe,
|
|
|
|
|
};
|
2017-10-19 10:22:10 +00:00
|
|
|
|
|
|
|
|
static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc,
|
|
|
|
|
char *const argv[])
|
|
|
|
|
{
|
|
|
|
|
if (argc != 1)
|
|
|
|
|
return CMD_RET_USAGE;
|
|
|
|
|
|
|
|
|
|
rockchip_show_logo();
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc,
|
|
|
|
|
char *const argv[])
|
|
|
|
|
{
|
|
|
|
|
if (argc != 2)
|
|
|
|
|
return CMD_RET_USAGE;
|
|
|
|
|
|
|
|
|
|
rockchip_show_bmp(argv[1]);
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
U_BOOT_CMD(
|
|
|
|
|
rockchip_show_logo, 1, 1, do_rockchip_logo_show,
|
|
|
|
|
"load and display log from resource partition",
|
|
|
|
|
NULL
|
|
|
|
|
);
|
|
|
|
|
|
|
|
|
|
U_BOOT_CMD(
|
|
|
|
|
rockchip_show_bmp, 2, 1, do_rockchip_show_bmp,
|
|
|
|
|
"load and display bmp from resource partition",
|
|
|
|
|
" <bmp_name>"
|
|
|
|
|
);
|